This paper addresses the development of computational models of digital integrated circuit input and output buffers via the identification of nonlinear parametric models. The obtained models run in standard circuit simulation environments, offer improved accuracy and good numerical efficiency, and do not disclose information on the structure of the modeled devices. The paper reviews the basics of the parametric identification approach and illustrates its most recent extensions to handle temperature and supply voltage variations as well as power supply ports and tristate devices.
M[pi]log, Macromodeling via parametric identification of logic gates / Stievano, IGOR SIMONE; Maio, Ivano Adolfo; Canavero, Flavio. - In: IEEE TRANSACTIONS ON ADVANCED PACKAGING. - ISSN 1521-3323. - STAMPA. - 27:1(2004), pp. 15-23. [10.1109/TADVP.2004.825475]
M[pi]log, Macromodeling via parametric identification of logic gates
STIEVANO, IGOR SIMONE;MAIO, Ivano Adolfo;CANAVERO, Flavio
2004
Abstract
This paper addresses the development of computational models of digital integrated circuit input and output buffers via the identification of nonlinear parametric models. The obtained models run in standard circuit simulation environments, offer improved accuracy and good numerical efficiency, and do not disclose information on the structure of the modeled devices. The paper reviews the basics of the parametric identification approach and illustrates its most recent extensions to handle temperature and supply voltage variations as well as power supply ports and tristate devices.File | Dimensione | Formato | |
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https://hdl.handle.net/11583/1402003
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