In this paper, a method to design and implement a very efficient multistage decimation filter for a sigma–delta () A/D converter is proposed. The scheme is composed by two stages, but the proposed method can be easily extended to a multiple-stage implementation. The first-stage filter is obtained by properly rotating the zero-pole distribution of a comb filter in the -plane. The obtained structure exhibits linear phase and can be implemented by using a recursive structure with only two multipliers. The design phase is easy and very flexible. As most of the quantization noise is eliminated at the first stage, the second-stage filter can be designed with relaxed specifications. Any classical design algorithm can be used for it. An alternative scheme for the second stage can be obtained by splitting the stage into two substages, and the method proposed in this paper can be iterated. The system performances are evaluated by simulation.

Efficient Modified-Sinc Filters for Sigma-Delta A/D Converters / LO PRESTI, Letizia. - In: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. 2, ANALOG AND DIGITAL SIGNAL PROCESSING. - ISSN 1057-7130. - STAMPA. - 47:(2000), pp. 1204-1213. [10.1109/82.885128]

Efficient Modified-Sinc Filters for Sigma-Delta A/D Converters

LO PRESTI, Letizia
2000

Abstract

In this paper, a method to design and implement a very efficient multistage decimation filter for a sigma–delta () A/D converter is proposed. The scheme is composed by two stages, but the proposed method can be easily extended to a multiple-stage implementation. The first-stage filter is obtained by properly rotating the zero-pole distribution of a comb filter in the -plane. The obtained structure exhibits linear phase and can be implemented by using a recursive structure with only two multipliers. The design phase is easy and very flexible. As most of the quantization noise is eliminated at the first stage, the second-stage filter can be designed with relaxed specifications. Any classical design algorithm can be used for it. An alternative scheme for the second stage can be obtained by splitting the stage into two substages, and the method proposed in this paper can be iterated. The system performances are evaluated by simulation.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/1401880
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