PISCOPO, VALERIA
PISCOPO, VALERIA
Dipartimento di Elettronica e Telecomunicazioni
097431
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CIRCE CROSS Integrated RISC-V Cryptographic Extension
2026 Dolmeta, Alessandra; Piscopo, Valeria; Martina, Maurizio; Masera, Guido
A Deep Dive into Integration Methodologies in RISC-V
2025 Piscopo, Valeria; Dolmeta, Alessandra; Mirigaldi, Mattia; Martina, Maurizio; Masera, Guido
CHIMERA: Cryptographic Hardware for Integrated Multipurpose Engine on RISC-V with ASCON
2025 Dolmeta, Alessandra; Piscopo, Valeria; Martina, Maurizio; Masera, Guido
RISC-V Based Keccak Co-Processor for NIST Post-Quantum Cryptography Standards
2025 Dolmeta, Alessandra; Piscopo, Valeria; Mirigaldi, Mattia; Martina, Maurizio; Masera, Guido
| Citazione | Data di pubblicazione | Autori | File |
|---|---|---|---|
| CIRCE CROSS Integrated RISC-V Cryptographic Extension / Dolmeta, A., Piscopo, V., Martina, M., Masera, G.. - ELETTRONICO. - (2026), pp. 1-3. (2026 Design, Automation & Test in Europe Conference (DATE) Verona (Ita) 20 - 23 April 2026) [10.23919/date69613.2026.11539337]. | 1-gen-2026 | Dolmeta, AlessandraPiscopo, ValeriaMartina, MaurizioMasera, Guido | CIRCE_CROSS_Integrated_RISC-V_Cryptographic_Extension.pdf; DATE_extended_abstract.pdf |
| A Deep Dive into Integration Methodologies in RISC-V / Piscopo, V., Dolmeta, A., Mirigaldi, M., Martina, M., Masera, G.. - ELETTRONICO. - (2025), pp. 30-33. (22nd ACM International Conference on Computing Frontiers Cagliari (Ita) May 28-30, 2025) [10.1145/3706594.3726969]. | 1-gen-2025 | Piscopo, ValeriaDolmeta, AlessandraMirigaldi, MattiaMartina, MaurizioMasera, Guido | 3706594-3726969.pdf |
| CHIMERA: Cryptographic Hardware for Integrated Multipurpose Engine on RISC-V with ASCON / Dolmeta, A., Piscopo, V., Martina, M., Masera, G.. - ELETTRONICO. - 1:(2025), pp. 1-6. (IEEE Computer Society Annual Symposium on VLSI Kalamata (Gre) July 6-9, 2025) [10.1109/ISVLSI65124.2025.11130264]. | 1-gen-2025 | Dolmeta,AlessandraPiscopo,ValeriaMartina,MaurizioMasera,Guido | 25_ISVLSI.pdf; CHIMERA_Cryptographic_Hardware_for_Integrated_Multipurpose_Engine_on_RISC-V_with_ASCON.pdf |
| RISC-V Based Keccak Co-Processor for NIST Post-Quantum Cryptography Standards / Dolmeta, A., Piscopo, V., Mirigaldi, M., Martina, M., Masera, G.. - ELETTRONICO. - (2025), pp. 1-5. (2025 IEEE International Symposium on Circuits and Systems Londra (UK) May 25-28, 2025) [10.1109/iscas56072.2025.11043433]. | 1-gen-2025 | Dolmeta, AlessandraPiscopo, ValeriaMirigaldi, MattiaMartina, MaurizioMasera, Guido | RISC-V_Based_Keccak_Co-Processor_for_NIST_Post-Quantum_Cryptography_Standards.pdf; ISCAS2025 (1).pdf |