Archivio Istituzionale della RicercaLOGHI, MIRKO
LOGHI, MIRKO
Dipartimento di Automatica Informatica (attivo dal 01/01/1900 al 31/12/2011)
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Risultati 1 - 11 di 11 (tempo di esecuzione: 0.03 secondi).
Architectural leakage-aware management of partitioned scratchpad memories
2007 Golubeva, O; Loghi, Mirko; Poncino, Massimo; Macii, Enrico
Locality-driven architectural cache sub-banking for leakage energy reduction
2007 Loghi, Mirko; Golubeva, O; Poncino, Massimo; Macii, Enrico
On the energy efficiency of synchronization primitives for shared-memory single-chip multiprocessors
2007 Golubeva, O; Loghi, Mirko; Poncino, Massimo
ISS-centric modular HW/SW co-simulation
2006 Fummi, F; Perbellini, G; Loghi, Mirko; Poncino, Massimo
Synchronization-driven dynamic speed scaling for MPSoCs
2006 Loghi, Mirko; Poncino, Massimo; Benini, L.
Exploring Energy/Performance Tradeoffs in Shared Memory MPSoCs: Snoop-Based Cache Coherence vs. Software Solutions
2005 Loghi, Mirko; Poncino, Massimo
Exploring the energy efficiency of cache coherence protocols in single-chip multi-processors
2005 Loghi, Mirko; Letis, M; Benini, L; Poncino, M.
Tag Overflow Buffering: An Energy-Efficient Cache Architecture
2005 Loghi, Mirko; Azzoni, P; Poncino, Massimo
Analyzing On-Chip Communication in a MPSoC Environment
2004 Loghi, Mirko; Angiolini, F; Bertozzi, D; Benini, L; Zafalon, R.
Analyzing Power Consumption of Message Passing Primitives in a Single-Chip Multiprocessor
2004 Loghi, Mirko; Poncino, Massimo; Benini, L.
“Cycle-Accurate Power Analysis for Multiprocessor Systems-on-a-Chip”
2004 Loghi, Mirko; L., Benini; Poncino, Massimo
| Citazione | Data di pubblicazione | Autori | File |
|---|---|---|---|
| Architectural leakage-aware management of partitioned scratchpad memories / Golubeva, O; Loghi, Mirko; Poncino, Massimo; Macii, Enrico. - (2007), pp. 1665-1670. (Intervento presentato al convegno IEEE Design Automation and Test in Europe Conference (DATE) tenutosi a Nice, France nel April 16-20, 2007) [10.1109/DATE.2007.364541]. | 1-gen-2007 | LOGHI, MIRKOPONCINO, MASSIMOMACII, Enrico + | - |
| Locality-driven architectural cache sub-banking for leakage energy reduction / Loghi, Mirko; Golubeva, O; Poncino, Massimo; Macii, Enrico. - (2007), pp. 274-279. (Intervento presentato al convegno International Symposium on Low Power Electronics and Design (ISLPED) tenutosi a Portland, OR, USA nel August 27-29 2007) [10.1145/1283780.1283839]. | 1-gen-2007 | LOGHI, MIRKOPONCINO, MASSIMOMACII, Enrico + | - |
| On the energy efficiency of synchronization primitives for shared-memory single-chip multiprocessors / Golubeva, O; Loghi, Mirko; Poncino, Massimo. - (2007), pp. 489-492. (Intervento presentato al convegno ACM Great Lakes symposium on VLSI (GLSVLSI) tenutosi a Stresa-Lago Maggiore, Italy nel March 11-13, 2007) [10.1145/1228784.1228900]. | 1-gen-2007 | LOGHI, MIRKOPONCINO, MASSIMO + | - |
| ISS-centric modular HW/SW co-simulation / Fummi, F; Perbellini, G; Loghi, Mirko; Poncino, Massimo. - (2006), pp. 31-36. (Intervento presentato al convegno ACM Great Lakes symposium on VLSI (GLSVLSI) tenutosi a Philadelphia, PA, USA nel April 30 - May 1, 2006) [10.1145/1127908.1127918]. | 1-gen-2006 | LOGHI, MIRKOPONCINO, MASSIMO + | - |
| Synchronization-driven dynamic speed scaling for MPSoCs / Loghi, Mirko; Poncino, Massimo; Benini, L.. - (2006), pp. 346-349. (Intervento presentato al convegno International Symposium on Low Power Electronics and Design (ISLPED) tenutosi a Tegernsee, Bavaria, Germany nel October 4-6, 2006) [10.1145/1165573.1165655]. | 1-gen-2006 | LOGHI, MIRKOPONCINO, MASSIMO + | - |
| Exploring Energy/Performance Tradeoffs in Shared Memory MPSoCs: Snoop-Based Cache Coherence vs. Software Solutions / Loghi, Mirko; Poncino, Massimo. - (2005). (Intervento presentato al convegno DATE’05: Design, Automation and Test in Europe) [10.1109/DATE.2005.148]. | 1-gen-2005 | LOGHI, MIRKOPONCINO, MASSIMO | - |
| Exploring the energy efficiency of cache coherence protocols in single-chip multi-processors / Loghi, Mirko; Letis, M; Benini, L; Poncino, M.. - (2005), pp. 276-281. (Intervento presentato al convegno ACM Great Lakes symposium on VLSI (GLSVLSI) tenutosi a Chicago, Illinois, USA nel April 17-19, 2005) [10.1145/1057661.1057728]. | 1-gen-2005 | LOGHI, MIRKOPONCINO M. + | - |
| Tag Overflow Buffering: An Energy-Efficient Cache Architecture / Loghi, Mirko; Azzoni, P; Poncino, Massimo. - (2005), pp. 520-525. (Intervento presentato al convegno IEEE Design Automation and Test in Europe Conference (DATE) tenutosi a Munich, Germany nel 7-11 March 2005) [10.1109/DATE.2005.298]. | 1-gen-2005 | LOGHI, MIRKOPONCINO, MASSIMO + | - |
| Analyzing On-Chip Communication in a MPSoC Environment / Loghi, Mirko; Angiolini, F; Bertozzi, D; Benini, L; Zafalon, R.. - (2004), pp. 752-757. (Intervento presentato al convegno IEEE Design Automation and Test in Europe Conference (DATE) tenutosi a Paris, France nel 16-20 February 2004). | 1-gen-2004 | LOGHI, MIRKO + | - |
| Analyzing Power Consumption of Message Passing Primitives in a Single-Chip Multiprocessor / Loghi, Mirko; Poncino, Massimo; Benini, L.. - (2004), pp. 393-396. (Intervento presentato al convegno IEEE International Conference on Computer Design (ICCD) tenutosi a San Jose, CA (USA) nel 11-13 October 2004) [10.1109/ICCD.2004.1347952]. | 1-gen-2004 | LOGHI, MIRKOPONCINO, MASSIMO + | Analyzing_power_consumption_of_message_passing_primitives_in_a_single-chip_multiprocessor.pdf |
| “Cycle-Accurate Power Analysis for Multiprocessor Systems-on-a-Chip” / Loghi, Mirko; L., Benini; Poncino, Massimo. - (2004). (Intervento presentato al convegno GLS-VLSI’04: IEEE 13th Great Lakes Symposium on VLSI) [10.1145/988952.989049]. | 1-gen-2004 | LOGHI, MIRKOPONCINO, MASSIMO + | - |