CALIMERA, ANDREA
 Distribuzione geografica
Continente #
NA - Nord America 2.257
EU - Europa 2.149
AS - Asia 1.239
AF - Africa 60
SA - Sud America 25
OC - Oceania 5
Continente sconosciuto - Info sul continente non disponibili 2
Totale 5.737
Nazione #
US - Stati Uniti d'America 2.216
IT - Italia 604
CN - Cina 484
DE - Germania 371
GB - Regno Unito 294
UA - Ucraina 274
JP - Giappone 218
IN - India 195
FR - Francia 177
IR - Iran 126
IE - Irlanda 97
NL - Olanda 93
KR - Corea 65
RU - Federazione Russa 56
TW - Taiwan 48
DZ - Algeria 36
CA - Canada 35
CZ - Repubblica Ceca 33
SG - Singapore 22
VN - Vietnam 19
AT - Austria 17
BR - Brasile 17
ZA - Sudafrica 16
CH - Svizzera 15
ES - Italia 15
HK - Hong Kong 14
SE - Svezia 14
MY - Malesia 11
PL - Polonia 11
BE - Belgio 10
FI - Finlandia 10
NO - Norvegia 10
RO - Romania 9
EU - Europa 8
BD - Bangladesh 6
TR - Turchia 6
CL - Cile 5
DK - Danimarca 5
AU - Australia 4
GR - Grecia 4
IL - Israele 4
IQ - Iraq 4
MX - Messico 4
UZ - Uzbekistan 4
AL - Albania 3
AM - Armenia 3
BG - Bulgaria 3
PT - Portogallo 3
TH - Thailandia 3
TN - Tunisia 3
AE - Emirati Arabi Uniti 2
AR - Argentina 2
BY - Bielorussia 2
EG - Egitto 2
HU - Ungheria 2
LV - Lettonia 2
MA - Marocco 2
MN - Mongolia 2
OM - Oman 2
PK - Pakistan 2
A1 - Anonimo 1
A2 - ???statistics.table.value.countryCode.A2??? 1
BS - Bahamas 1
BZ - Belize 1
KZ - Kazakistan 1
LB - Libano 1
LT - Lituania 1
NG - Nigeria 1
NZ - Nuova Zelanda 1
PE - Perù 1
PS - Palestinian Territory 1
RS - Serbia 1
SY - Repubblica araba siriana 1
Totale 5.737
Città #
Houston 244
Beijing 224
Ashburn 203
Fairfield 197
Southend 195
Seattle 173
Turin 144
Ann Arbor 118
Buffalo 100
Dublin 95
Santa Cruz 94
Woodbridge 89
Hangzhou 86
Torino 82
Mountain View 81
Bremen 64
Southampton 55
Wilmington 54
Cambridge 53
Boardman 40
Miami 39
Shenzhen 30
San Donato Milanese 28
Chandler 27
Frankfurt 26
Herkenbosch 26
Milan 26
Höst 24
Bangalore 23
Taipei 23
Hiroshima 22
San Jose 21
Tehran 21
Bengaluru 20
Washington 20
Fremont 19
Kansas City 19
Putian 17
University Park 17
San Ramon 16
Chicago 15
Dong Ket 15
Karlsruhe 15
Los Angeles 15
Amsterdam 14
Bologna 14
Daejeon 14
Hefei 14
Las Vegas 14
New Delhi 14
San Diego 14
Seoul 14
Tokyo 14
Venaria Reale 14
Zhengzhou 14
Norwalk 13
Toronto 13
Vienna 13
Munich 12
Tavagnasco 12
Wuhan 12
Chennai 11
Riva 11
Muizenberg 10
Overberg 10
Palakkad 10
Phoenix 10
Rome 10
Singapore 10
Xiamen 10
Barcelona 9
Basking Ridge 9
Settimo Torinese 9
Andover 8
Beaumont 8
Hebei 8
Lake Forest 8
Massy 8
Nürnberg 8
Oslo 8
Pune 8
Algiers 7
Chilliwack 7
Hartford 7
Henderson 7
Mumbai 7
New York 7
Paris 7
San Francisco 7
Central District 6
Changsha 6
Columbus 6
Dhaka 6
Fuzhou 6
Herndon 6
Irvine 6
Lviv 6
Nanjing 6
Pennsylvania Furnace 6
Shanghai 6
Totale 3.449
Nome #
Aging Effects of Leakage Optimizations for Caches, file e384c42e-0a64-d4b2-e053-9f05fe0a1d67 883
NBTI-Aware Data Allocation Strategies for Scratchpad Memory Based Embedded Systems, file e384c42e-0bf8-d4b2-e053-9f05fe0a1d67 657
Modeling of thermally induced skew variations in clock distribution network, file e384c42e-0bf9-d4b2-e053-9f05fe0a1d67 614
Partitioned cache architectures for reduced NBTI-induced aging, file e384c42e-0bfb-d4b2-e053-9f05fe0a1d67 551
Power-Gating: More Than Leakage Savings, file e384c42e-0a65-d4b2-e053-9f05fe0a1d67 373
A New Built-In Current Sensor Scheme to Detect Dynamic Faults in Nano-Scale SRAMs, file e384c42e-0bf7-d4b2-e053-9f05fe0a1d67 357
Buffering of frequent accesses for reduced cache aging, file e384c42e-0bfa-d4b2-e053-9f05fe0a1d67 335
Ultra-low power circuits using graphene p-n junctions and adiabatic computing, file e384c42e-8353-d4b2-e053-9f05fe0a1d67 320
Quasi-Adiabatic Logic Arrays for Silicon and Beyond-Silicon Energy-Efficient ICs, file e384c431-a2ff-d4b2-e053-9f05fe0a1d67 128
Ultra-Fine Grain Vdd-Hopping for energy-efficient Multi-Processor SoCs, file e384c431-7585-d4b2-e053-9f05fe0a1d67 108
An Automated Design Flow for Approximate Circuits based on Reduced Precision Redundancy, file e384c431-934f-d4b2-e053-9f05fe0a1d67 106
Multi-function logic synthesis of silicon and beyond-silicon ultra-low power pass-gates circuits, file e384c431-a300-d4b2-e053-9f05fe0a1d67 96
Beyond Ideal DVFS Through Ultra-Fine Grain Vdd-Hopping, file e384c431-a2fc-d4b2-e053-9f05fe0a1d67 81
Optimality Assessment of Memory-Bounded ConvNets Deployed on Resource-Constrained RISC Cores, file e384c431-578d-d4b2-e053-9f05fe0a1d67 74
Logic Synthesis for Silicon and Beyond-Silicon Multi-gate Pass-Logic Circuits, file e384c431-7266-d4b2-e053-9f05fe0a1d67 65
Manufacturing as a Data-Driven Practice: Methodologies, Technologies, and Tools, file e384c432-a64a-d4b2-e053-9f05fe0a1d67 61
Inference on the Edge: Performance Analysis of an Image Classification Task Using Off-The-Shelf CPUs and Open-Source ConvNets, file e384c432-01fa-d4b2-e053-9f05fe0a1d67 56
One-pass logic synthesis for graphene-based Pass-XNOR logic circuits, file e384c42e-827f-d4b2-e053-9f05fe0a1d67 52
Efficacy of topology scaling for temperature and latency constrained embedded convnets, file e384c432-22d3-d4b2-e053-9f05fe0a1d67 50
Energy-Quality Scalable Monocular Depth Estimation on Low-Power CPUs, file e384c433-db8a-d4b2-e053-9f05fe0a1d67 50
Enabling monocular depth perception at the very edge, file e384c432-ae1e-d4b2-e053-9f05fe0a1d67 49
Reducing the Energy Consumption of sEMG-Based Gesture Recognition at the Edge Using Transformers and Dynamic Inference, file 8b6be7f7-5ca5-4068-b30b-46ccf4e07e10 48
ACME: An energy-efficient approximate bus encoding for I2C, file e384c433-ed50-d4b2-e053-9f05fe0a1d67 46
Integer ConvNets on embedded CPUs: Tools and performance assessment on the cortex-A cores, file e384c432-01f9-d4b2-e053-9f05fe0a1d67 45
Monocular Depth Perception on Microcontrollers for Edge Applications, file e384c433-db89-d4b2-e053-9f05fe0a1d67 45
Ultra-compact binary neural networks for human activity recognition on RISC-V processors, file e384c433-e13e-d4b2-e053-9f05fe0a1d67 44
Performance Profiling of Embedded ConvNets under Thermal-Aware DVFS, file e384c431-22dd-d4b2-e053-9f05fe0a1d67 39
CoopNet: Cooperative convolutional neural network for low-power MCUs, file e384c431-feb4-d4b2-e053-9f05fe0a1d67 36
TentacleNet: A Pseudo-Ensemble Template for Accurate Binary Convolutional Neural Networks, file e384c431-feb2-d4b2-e053-9f05fe0a1d67 34
Layer-wise compressive training for convolutional neural networks, file e384c431-c103-d4b2-e053-9f05fe0a1d67 30
Dataflow Restructuring for Active Memory Reduction in Deep Neural Networks, file e384c433-df96-d4b2-e053-9f05fe0a1d67 29
Inferential Logic: A Machine Learning Inspired Paradigm for Combinational Circuits, file e384c431-cc46-d4b2-e053-9f05fe0a1d67 28
Arbitrary-Precision Convolutional Neural Networks on Low-Power IoT Processors, file e384c432-d250-d4b2-e053-9f05fe0a1d67 27
Logic Synthesis of Pass-Gate Logic Circuits with Emerging Ambipolar Technologies, file e384c431-7264-d4b2-e053-9f05fe0a1d67 26
EAST: Encoding-Aware Sparse Training for Deep Memory Compression of ConvNets, file e384c432-0683-d4b2-e053-9f05fe0a1d67 25
TVFS: Topology Voltage Frequency Scaling for Reliable Embedded ConvNets, file e384c432-d256-d4b2-e053-9f05fe0a1d67 25
Fast and Accurate Inference on Microcontrollers with Boosted Cooperative Convolutional Neural Networks (BC-Net), file e384c433-cd36-d4b2-e053-9f05fe0a1d67 22
Power-gating for leakage control and beyond, file e384c431-9c14-d4b2-e053-9f05fe0a1d67 21
Characterizing the activity factor in NBTI aging models for embedded cores, file e384c431-c704-d4b2-e053-9f05fe0a1d67 19
AdapTTA: Adaptive Test-Time Augmentation for Reliable Embedded ConvNets, file e384c434-026f-d4b2-e053-9f05fe0a1d67 19
Implementing adaptive voltage over-scaling: Algorithmic noise tolerance vs. approximate error detection, file e384c430-fc05-d4b2-e053-9f05fe0a1d67 17
Graphene-PLA (GPLA): A compact and ultra-low power logic array architecture, file e384c431-b249-d4b2-e053-9f05fe0a1d67 16
On the Efficiency of Sparse-Tiled Tensor Graph Processing for Low Memory Usage, file e384c434-6ff7-d4b2-e053-9f05fe0a1d67 15
Energy-efficient and Privacy-aware Social Distance Monitoring with Low-resolution Infrared Sensors and Adaptive Inference, file 1da46a54-7d3f-4586-ae4f-4e1ba5ba79a2 13
Exploiting the Expressive Power of Graphene Reconfigurable Gates via Post-Synthesis Optimization, file e384c42e-8354-d4b2-e053-9f05fe0a1d67 13
Privacy-preserving Social Distance Monitoring on Microcontrollers with Low-Resolution Infrared Sensors and CNNs, file bd4d2aeb-971c-4067-9ba8-92f63e0159c1 12
Human Activity Recognition on Microcontrollers with Quantized and Adaptive Deep Neural Networks, file fdcf5792-f5ac-46cb-92e6-85374bc66224 11
Adaptive Random Forests for Energy-Efficient Inference on Microcontrollers, file 4c78e1a8-1a50-49f5-9a9d-7d37f46310db 9
Axp: A hw-sw co-design pipeline for energy-efficient approximated convnets via associative matching, file e384c434-4e7c-d4b2-e053-9f05fe0a1d67 9
Human Activity Recognition on Microcontrollers with Quantized and Adaptive Deep Neural Networks, file d879d52b-a9f4-4594-894b-67676cb37005 8
Efficient Deep Learning Models for Privacy-preserving People Counting on Low-resolution Infrared Arrays, file e132c370-f0e6-48ff-bfac-677176a778a1 8
Low-Overhead Early-Stopping Policies for Efficient Random Forests Inference on Microcontrollers, file a7ea62fd-76c5-4ac1-a8e3-61e07a29511e 7
All-digital embedded meters for on-line power estimation, file e384c430-293f-d4b2-e053-9f05fe0a1d67 7
SMART-IC: Smart Monitoring and Production Optimization for Zero-waste Semiconductor Manufacturing, file 539d9174-272d-4beb-84dd-c246f3aede9c 5
Ultra-compact binary neural networks for human activity recognition on RISC-V processors, file e384c433-e13f-d4b2-e053-9f05fe0a1d67 5
Automatic Layer Freezing for Communication Efficiency in Cross-Device Federated Learning, file aa9f214b-6c24-444f-a6cb-b0e1dd97e285 4
Privacy-preserving Social Distance Monitoring on Microcontrollers with Low-Resolution Infrared Sensors and CNNs, file cbf724c1-6ef2-4ee5-9287-bfa764c79fc0 4
Energy-efficient and Privacy-aware Social Distance Monitoring with Low-resolution Infrared Sensors and Adaptive Inference, file cf645148-363c-4d4f-9ac0-f7fbf9c622eb 4
Dynamic ConvNets on Tiny Devices via Nested Sparsity, file d918b6f3-05c3-483a-be49-273511d15611 4
Logic-In-Memory Architecture For Min/Max Search, file e384c430-ffc4-d4b2-e053-9f05fe0a1d67 4
Communication-Efficient Federated Learning with Gradual Layer Freezing, file fe2f2c1b-c007-4596-bc2e-3404fc81d9c9 4
Adaptive Random Forests for Energy-Efficient Inference on Microcontrollers, file 22e32113-0361-4a73-8b93-7f37beb3ba1b 3
Quasi-Adiabatic Logic Arrays for Silicon and Beyond-Silicon Energy-Efficient ICs, file e384c431-cc17-d4b2-e053-9f05fe0a1d67 3
ACME: An energy-efficient approximate bus encoding for I2C, file e384c433-f32d-d4b2-e053-9f05fe0a1d67 3
Enabling DVFS Side-Channel Attacks for Neural Network Fingerprinting in Edge Inference Services, file 2f10dd50-323a-4292-b5fc-8d6cd818afc4 2
Low-Overhead Early-Stopping Policies for Efficient Random Forests Inference on Microcontrollers, file cb0b02bb-72a2-4d59-aeb7-f76721fdb9a0 2
Inferential Logic: A Machine Learning Inspired Paradigm for Combinational Circuits, file e384c431-7594-d4b2-e053-9f05fe0a1d67 2
An Automated Design Flow for Approximate Circuits based on Reduced Precision Redundancy, file e384c431-78a4-d4b2-e053-9f05fe0a1d67 2
Integer ConvNets on embedded CPUs: Tools and performance assessment on the cortex-A cores, file e384c431-e0cc-d4b2-e053-9f05fe0a1d67 2
Manufacturing as a Data-Driven Practice: Methodologies, Technologies, and Tools, file e384c433-2741-d4b2-e053-9f05fe0a1d67 2
All-digital embedded meters for on-line power estimation, file e384c434-4114-d4b2-e053-9f05fe0a1d67 2
Optimization Tools for ConvNets on the Edge, file e384c434-9cf5-d4b2-e053-9f05fe0a1d67 2
Efficient Deep Learning Models for Privacy-preserving People Counting on Low-resolution Infrared Arrays, file fcf1ab1e-0da3-4e6c-89cd-d82b5b8d9fdc 2
Concurrent Pipeline Stages Optimization for Embedded Keyword Spotting, file 05ba5745-21d9-415a-9898-bcf115cc317a 1
Communication-Efficient Federated Learning with Gradual Layer Freezing, file 41725442-c2d4-4034-b88e-7691cbd4ec18 1
On the Efficiency of AdapTTA: An Adaptive Test-Time Augmentation Strategy for Reliable Embedded ConvNets, file 7bda6f6c-9fab-4e07-9588-abdd869c2681 1
Automatic Layer Freezing for Communication Efficiency in Cross-Device Federated Learning, file c5c3b309-fd4b-4230-9f46-f1c44582273b 1
Layout-Driven Post-Placement Techniques for Temperature Reduction and Thermal Gradient Minimization, file e384c42e-a05f-d4b2-e053-9f05fe0a1d67 1
Design Techniques and Architectures for Low-Leakage SRAMs, file e384c42e-ae6c-d4b2-e053-9f05fe0a1d67 1
Multi-function logic synthesis of silicon and beyond-silicon ultra-low power pass-gates circuits, file e384c431-81d7-d4b2-e053-9f05fe0a1d67 1
Logic Synthesis of Pass-Gate Logic Circuits with Emerging Ambipolar Technologies, file e384c431-90c4-d4b2-e053-9f05fe0a1d67 1
Ultra-Fine Grain Vdd-Hopping for energy-efficient Multi-Processor SoCs, file e384c431-cb4f-d4b2-e053-9f05fe0a1d67 1
Characterizing the activity factor in NBTI aging models for embedded cores, file e384c431-cc4d-d4b2-e053-9f05fe0a1d67 1
Inference on the Edge: Performance Analysis of an Image Classification Task Using Off-The-Shelf CPUs and Open-Source ConvNets, file e384c431-cfd9-d4b2-e053-9f05fe0a1d67 1
TentacleNet: A Pseudo-Ensemble Template for Accurate Binary Convolutional Neural Networks, file e384c431-ea85-d4b2-e053-9f05fe0a1d67 1
CoopNet: Cooperative convolutional neural network for low-power MCUs, file e384c431-feb3-d4b2-e053-9f05fe0a1d67 1
Design-Space Exploration of Pareto-Optimal Architectures for Deep Learning with DVFS, file e384c432-042f-d4b2-e053-9f05fe0a1d67 1
EAST: Encoding-Aware Sparse Training for Deep Memory Compression of ConvNets, file e384c432-0684-d4b2-e053-9f05fe0a1d67 1
Quasi-exact logic functions through classification trees, file e384c432-19ba-d4b2-e053-9f05fe0a1d67 1
Approximate Error Detection-Correction for efficient Adaptive Voltage Over-Scaling, file e384c432-1e7e-d4b2-e053-9f05fe0a1d67 1
Enabling monocular depth perception at the very edge, file e384c432-cfa7-d4b2-e053-9f05fe0a1d67 1
TVFS: Topology Voltage Frequency Scaling for Reliable Embedded ConvNets, file e384c433-9080-d4b2-e053-9f05fe0a1d67 1
On the Efficiency of Sparse-Tiled Tensor Graph Processing for Low Memory Usage, file e384c434-b567-d4b2-e053-9f05fe0a1d67 1
Totale 5.900
Categoria #
all - tutte 12.320
article - articoli 1.760
book - libri 0
conference - conferenze 10.256
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 304
Totale 24.640


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2018/2019117 0 0 0 0 0 0 0 0 0 0 61 56
2019/2020483 35 25 16 38 37 34 42 69 59 40 41 47
2020/2021727 57 84 58 54 77 47 60 53 51 63 62 61
2021/2022978 60 41 67 173 160 56 76 48 31 77 141 48
2022/2023589 20 41 117 73 96 78 56 27 54 19 8 0
2023/202440 1 0 2 1 0 10 8 11 0 1 6 0
Totale 5.900