The research presented in this thesis was carried out in VISHAY Semiconductor Italiana S.P.A. at Borgaro Torinese - Italy. The framework of this thesis is the study of new materials for power electronics application, analysing their thermal, mechanical and electrical properties. Emerging application of high power systems requires new methods for power electronics integration and packaging. Stringent requirements in size and weight, reliability, durability, ambient and operation temperatures are pushing to go beyond the limits in industrial applications. As a consequence, our studies are focused on power modules, incorporating new materials and technology processes (sintering) for dies or chips (silicon), substrates and interconnection materials (wire bonding). This thesis work starts introducing the power semiconductor devices used in power electronics and their integration on Power Integrated Circuits (low and medium power density) and Power Modules (medium, high and very high power density). This chapter will explain technology evolution, power semiconductor device utilization mode and some applications. Chapter 2 will be focused on power modules packages. They have an important role for providing cooling, electrical connection and correct insulation, between the internal semiconductor devices and the external circuit. Isolated and non isolated packages are analysed and compared. Chapter 3 will make a point on the methods of thermal characterization and reliability tests, that were implemented to evaluate the impact of the introduction of new materials and processes into the device. In chapter 4, first experimental results, related to the sintering process will be discussed. In this chapter the attention will be focused on the Chip to substrate Joint of the device, analysing methods to mechanically fix die to substrate. The sintering process will be treated, analysing the process and the results will be thermally and mechanically characterized. The chapter 5 will present the experimental part oriented to the combinations of materials to produce a better heavy wire bonding, supported by a Design of Experiments (DOE). The behaviour of didifferent wires will be compared through thermal characterization methods and reliability test.

ISPET: Interface Sintering Process Enhanced Technology / Cosiansi, Fernando. - (2016). [10.6092/polito/porto/2643767]

ISPET: Interface Sintering Process Enhanced Technology

COSIANSI, FERNANDO
2016

Abstract

The research presented in this thesis was carried out in VISHAY Semiconductor Italiana S.P.A. at Borgaro Torinese - Italy. The framework of this thesis is the study of new materials for power electronics application, analysing their thermal, mechanical and electrical properties. Emerging application of high power systems requires new methods for power electronics integration and packaging. Stringent requirements in size and weight, reliability, durability, ambient and operation temperatures are pushing to go beyond the limits in industrial applications. As a consequence, our studies are focused on power modules, incorporating new materials and technology processes (sintering) for dies or chips (silicon), substrates and interconnection materials (wire bonding). This thesis work starts introducing the power semiconductor devices used in power electronics and their integration on Power Integrated Circuits (low and medium power density) and Power Modules (medium, high and very high power density). This chapter will explain technology evolution, power semiconductor device utilization mode and some applications. Chapter 2 will be focused on power modules packages. They have an important role for providing cooling, electrical connection and correct insulation, between the internal semiconductor devices and the external circuit. Isolated and non isolated packages are analysed and compared. Chapter 3 will make a point on the methods of thermal characterization and reliability tests, that were implemented to evaluate the impact of the introduction of new materials and processes into the device. In chapter 4, first experimental results, related to the sintering process will be discussed. In this chapter the attention will be focused on the Chip to substrate Joint of the device, analysing methods to mechanically fix die to substrate. The sintering process will be treated, analysing the process and the results will be thermally and mechanically characterized. The chapter 5 will present the experimental part oriented to the combinations of materials to produce a better heavy wire bonding, supported by a Design of Experiments (DOE). The behaviour of didifferent wires will be compared through thermal characterization methods and reliability test.
2016
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2643767
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