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Symbolic Algorithms for Layout-Oriented Synthesis of Pass Transistor Logic Circuits
1998 Ferrandi, F; Macii, Alberto; Macii, Enrico; Poncino, Massimo; Scarsi, R; Somenzi, F.
Symbolic Algorithms to Calculate Steady-State Probabilities of a Finite State Machine
1994 Hachtel, G. D.; Macii, Enrico; Pardo, A; Somenzi, F.
Symbolic Computation of Logic Implications for Technology-Dependent Low-Power Synthesis
1996 Bahar, R. I.; Burns, M; Hachtel, G. D.; Macii, Enrico; Shin, H; Somenzi, F.
Symbolic Low-Power Re-Synthesis of Large Sequential Circuits Based on Clock Gating Mechanisms
1997 Benini, L.; De Micheli, G.; Macii, Enrico; Poncino, Massimo; Scarsi, R.
Symbolic Optimization of FSM Networks Based on Sequential ATPG Techniques
1996 Ferrandi, F; Fummi, F; Macii, Enrico; Poncino, Massimo; Sciuto, D.
Symbolic Representation and Manipulation of Large Neural Networks
1995 Macii, Enrico; Poncino, Massimo
Symbolic Synthesis of Clock-Gating Logic for Power Optimization of Control-Oriented Synchronous Networks
1997 Benini, L; DE MICHELI, G; Macii, Enrico; Poncino, M; Scarsi, R.
Synthesis of application-specific memories for power optimization in embedded systems
2000 L., Benini; Macii, Alberto; Macii, Enrico; Poncino, Massimo
Synthesis of Fully Testable Combinational Logic
1994 Evans, A.; Macii, E.; Poncino, Massimo
Synthesis of Low-Overhead Interfaces for Power-Efficient Communication over Wide Buses
1999 Benini, L.; Macii, Alberto; Macii, Enrico; Poncino, Massimo; Scarsi, R.
Citazione | Data di pubblicazione | Autori | File |
---|---|---|---|
Symbolic Algorithms for Layout-Oriented Synthesis of Pass Transistor Logic Circuits / Ferrandi, F; Macii, Alberto; Macii, Enrico; Poncino, Massimo; Scarsi, R; Somenzi, F.. - (1998), pp. 235-241. (Intervento presentato al convegno ICCAD-98: IEEE/ACM 1998 International Conference on Computer-Aided Design tenutosi a San Jose, CA) [10.1145/288548.288619]. | 1-gen-1998 | MACII, AlbertoMACII, EnricoPONCINO, MASSIMO + | - |
Symbolic Algorithms to Calculate Steady-State Probabilities of a Finite State Machine / Hachtel, G. D.; Macii, Enrico; Pardo, A; Somenzi, F.. - (1994), pp. 214-218. (Intervento presentato al convegno EDTC-94: IEEE 1994 European Design and Test Conference tenutosi a Paris, France) [10.1109/EDTC.1994.326875]. | 1-gen-1994 | MACII, Enrico + | - |
Symbolic Computation of Logic Implications for Technology-Dependent Low-Power Synthesis / Bahar, R. I.; Burns, M; Hachtel, G. D.; Macii, Enrico; Shin, H; Somenzi, F.. - (1996), pp. 163-168. (Intervento presentato al convegno ISLPED-96: ACM/IEEE International Symposium on Low-Power Electronics and Design tenutosi a Monterey, CA) [10.1109/LPE.1996.547500]. | 1-gen-1996 | MACII, Enrico + | - |
Symbolic Low-Power Re-Synthesis of Large Sequential Circuits Based on Clock Gating Mechanisms / Benini, L.; De Micheli, G.; Macii, Enrico; Poncino, Massimo; Scarsi, R.. - (1997). (Intervento presentato al convegno ED&TC’97: 1997 European Design and Test Conference) [10.1109/EDTC.1997.582409]. | 1-gen-1997 | MACII, EnricoPONCINO, MASSIMO + | - |
Symbolic Optimization of FSM Networks Based on Sequential ATPG Techniques / Ferrandi, F; Fummi, F; Macii, Enrico; Poncino, Massimo; Sciuto, D.. - (1996), pp. 467-470. (Intervento presentato al convegno DAC-33: ACM/IEEE Design Automation Conference tenutosi a Las Vegas, NV) [10.1109/DAC.1996.545621]. | 1-gen-1996 | MACII, EnricoPONCINO, MASSIMO + | - |
Symbolic Representation and Manipulation of Large Neural Networks / Macii, Enrico; Poncino, Massimo. - (1995), pp. 112-116. (Intervento presentato al convegno IEEE 1995 International Conference on Computer Applications in Engineering and Medicine tenutosi a Indianapolis, IN). | 1-gen-1995 | MACII, EnricoPONCINO, MASSIMO | - |
Symbolic Synthesis of Clock-Gating Logic for Power Optimization of Control-Oriented Synchronous Networks / Benini, L; DE MICHELI, G; Macii, Enrico; Poncino, M; Scarsi, R.. - (1997), pp. 514-520. (Intervento presentato al convegno EDTC-97: IEEE 1997 European Design and Test Conference tenutosi a Paris, France) [10.1109/EDTC.1997.582409]. | 1-gen-1997 | BENINI LMACII, Enrico + | - |
Synthesis of application-specific memories for power optimization in embedded systems / L., Benini; Macii, Alberto; Macii, Enrico; Poncino, Massimo. - (2000), pp. 300-303. (Intervento presentato al convegno DAC-37: ACM/IEEE Design Automation Conference tenutosi a Los Angeles CA (USA) nel June 5-9, 2000) [10.1109/DAC.2000.855324]. | 1-gen-2000 | MACII, AlbertoMACII, EnricoPONCINO, MASSIMO + | - |
Synthesis of Fully Testable Combinational Logic / Evans, A.; Macii, E.; Poncino, Massimo. - (1994). (Intervento presentato al convegno MWSCAS'94: IEEE Midwest Symposium on Circuits and Systems) [10.1109/MWSCAS.1994.519228]. | 1-gen-1994 | MACII E.PONCINO, MASSIMO + | - |
Synthesis of Low-Overhead Interfaces for Power-Efficient Communication over Wide Buses / Benini, L.; Macii, Alberto; Macii, Enrico; Poncino, Massimo; Scarsi, R.. - (1999), pp. 128-133. (Intervento presentato al convegno DAC-36: ACM/IEEE Design Automation Conference nel Giugno) [10.1145/309847.309898]. | 1-gen-1999 | MACII, AlbertoMACII, EnricoPONCINO, MASSIMO + | - |
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