As the consequence of demanding higher data bit-rates and wider information bandwidths in modern wireless communication systems, complex non-constant envelope modulation signals with high peak to average ratio (PAPR) have been emerged. Hence, conventional power amplifiers must be operated in back-off to meet the stringent linearity requirements, resulting in a substantial efficiency degradation. Various power amplifier topologies (i.e. switch-mode, Doherty, out-phasing and envelope tracking) are the crucial players in the field of efficient operation. Among all these architectures, the envelope tracking power amplifier (ETPA) proves to be the most appropriate candidate to keep the efficiency and linearity high while handling high PAPR signals under average power back-off. Envelope tracking technique is dynamically adjusting the supply voltage to the power amplifier in synchronicity with the envelope of the RF signal. This research is concentrated on the analysis and design of envelope tracking power amplifiers according to the requirements of fourth generation of mobile telecommunications technology. This dissertation studies the structure of a wide-band envelope modulator as the heart of the system. Its architecture is the combination of a linear amplification stage to cover the high frequency components of the LTE envelope signal and a switching-mode DC-DC buck converter to support the low frequency components, efficiently. Besides, it presents the block diagram and the test bench for the envelope tracking power amplifier and explains how the broadband high-efficiency envelope modulator improves the efficiency and the linearity of the whole system. Afterward, the 20MHz LTE envelope modulator is designed and simulated in Cadence Orcad (Pspice) for Gallium Arsenide (GaAs) and Gallium Nitride (GaN) RF power amplifier applications, separately. The obtained efficiencies at the simulation stage, with a constant resistive load, are 70% and 64%, respectively. At the next step, the envelope modulator for GaAs application is implemented on printed circuit board (PCB). The laboratory experimental measurements is primarily carried out with a constant resistive load to verify the performance of the design and the efficiency of 68% obtained while the input is 20MHz LTE down-link envelope signal. Finally, the implemented envelope modulator is mounted on the GaAs power amplifier with envelope signal of 20MHz bandwidths LTE down-link with a PAR of 6.6dB and RF carrier signal at the frequency of 0.9GHz and QPSK modulation. The experimental results demonstrates 21% gross efficiency enhancement and 5% overall system efficiency improvement.

Analysis and Design of Envelope Tracking Power Amplifier / JAVAN KHOSHKHOLGH, Amir. - (2015).

Analysis and Design of Envelope Tracking Power Amplifier

JAVAN KHOSHKHOLGH, AMIR
2015

Abstract

As the consequence of demanding higher data bit-rates and wider information bandwidths in modern wireless communication systems, complex non-constant envelope modulation signals with high peak to average ratio (PAPR) have been emerged. Hence, conventional power amplifiers must be operated in back-off to meet the stringent linearity requirements, resulting in a substantial efficiency degradation. Various power amplifier topologies (i.e. switch-mode, Doherty, out-phasing and envelope tracking) are the crucial players in the field of efficient operation. Among all these architectures, the envelope tracking power amplifier (ETPA) proves to be the most appropriate candidate to keep the efficiency and linearity high while handling high PAPR signals under average power back-off. Envelope tracking technique is dynamically adjusting the supply voltage to the power amplifier in synchronicity with the envelope of the RF signal. This research is concentrated on the analysis and design of envelope tracking power amplifiers according to the requirements of fourth generation of mobile telecommunications technology. This dissertation studies the structure of a wide-band envelope modulator as the heart of the system. Its architecture is the combination of a linear amplification stage to cover the high frequency components of the LTE envelope signal and a switching-mode DC-DC buck converter to support the low frequency components, efficiently. Besides, it presents the block diagram and the test bench for the envelope tracking power amplifier and explains how the broadband high-efficiency envelope modulator improves the efficiency and the linearity of the whole system. Afterward, the 20MHz LTE envelope modulator is designed and simulated in Cadence Orcad (Pspice) for Gallium Arsenide (GaAs) and Gallium Nitride (GaN) RF power amplifier applications, separately. The obtained efficiencies at the simulation stage, with a constant resistive load, are 70% and 64%, respectively. At the next step, the envelope modulator for GaAs application is implemented on printed circuit board (PCB). The laboratory experimental measurements is primarily carried out with a constant resistive load to verify the performance of the design and the efficiency of 68% obtained while the input is 20MHz LTE down-link envelope signal. Finally, the implemented envelope modulator is mounted on the GaAs power amplifier with envelope signal of 20MHz bandwidths LTE down-link with a PAR of 6.6dB and RF carrier signal at the frequency of 0.9GHz and QPSK modulation. The experimental results demonstrates 21% gross efficiency enhancement and 5% overall system efficiency improvement.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2592754
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