The Warren Instruction Set for the relative abstract machine designed for the execution of Prolog programs is coded by means of a two part opcode. The first part has a fixed, 8-bit format and the second part may have a variable format of 8 or of 32 bits containing the value of a respective register or registers. The fourth and the eighth bit of the first part of the opcode are exploited for interrupting the decoding step, in order to reduce the execution times and for signalling the presence of a second part of opcode with a 32 bit format containing the value of a certain register.
WIS codification for prolog programs execution / CIVERA P.; ORTELLI S.; PAGNI A.; PICCINELLI P.; PICCININI G.L.; POLUZZI R.; RUO ROCH M.; ZAMBONI M.. - (1992).
Titolo: | WIS codification for prolog programs execution | |
Autori: | ||
Data di pubblicazione: | 1992 | |
Abstract: | The Warren Instruction Set for the relative abstract machine designed for the execution of Prolog programs is coded by means of a two part opcode. The first part has a fixed, 8-bit format and the second part may have a variable format of 8 or of 32 bits containing the value of a respective register or registers. The fourth and the eighth bit of the first part of the opcode are exploited for interrupting the decoding step, in order to reduce the execution times and for signalling the presence of a second part of opcode with a 32 bit format containing the value of a certain register. | |
Appare nelle tipologie: | 6.1 Brevetto |
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http://hdl.handle.net/11583/1914750