Archivio Istituzionale della RicercaMASERA, Guido
MASERA, Guido
Dipartimento di Elettronica e Telecomunicazioni
001918
CIRCE CROSS Integrated RISC-V Cryptographic Extension
2026 Dolmeta, Alessandra; Piscopo, Valeria; Martina, Maurizio; Masera, Guido
Compact Yet Fast: An Efficient d-Order Masked Implementation of Ascon
2026 Mirigaldi, Mattia; Paninforni, Nico; Martina, Maurizio; Masera, Guido
A Deep Dive into Integration Methodologies in RISC-V
2025 Piscopo, Valeria; Dolmeta, Alessandra; Mirigaldi, Mattia; Martina, Maurizio; Masera, Guido
CHIMERA: Cryptographic Hardware for Integrated Multipurpose Engine on RISC-V with ASCON
2025 Dolmeta, Alessandra; Piscopo, Valeria; Martina, Maurizio; Masera, Guido
Exploring the New CV-X-IF Interface to Customize RISC-V Instruction Sets: A Case of Study in Cryptography
2025 Dolmeta, Alessandra; Martina, Maurizio; Masera, Guido
Just TestIt! An SBST Approach To Automate System-Integration Testing
2025 Terzano, Tommaso; Giuffrida, Luigi; Sapriza, Juan; Schiavone, Pasquale Davide; Masera, Guido; Atienza, David; Lavagno, Luciano; Martina, Maurizio
Performance Comparison: Software vs. Hardware Implementation of Novel S-Box Designed to Resist Power Analysis Attack
2025 Mirigaldi, Mattia; Martina, Maurizio; Masera, Guido
Power Side-Channel Vulnerabilities of a RISC-V Cryptography Accelerator Integrated into CVA6 via Core-V eXtension Interface (CV-X-IF)
2025 Farnaghinejad, Behnam; Bellizia, Davide; Dolmeta, Alessandra; Masera, Guido; Porsia, Antonio; Ruospo, Annachiara; Di Carlo, Stefano; Savino, Alessandro; Sanchez, Ernesto
RISC-V Based Keccak Co-Processor for NIST Post-Quantum Cryptography Standards
2025 Dolmeta, Alessandra; Piscopo, Valeria; Mirigaldi, Mattia; Martina, Maurizio; Masera, Guido
TinyCL: An Efficient Hardware Architecture for Continual Learning on Autonomous Systems
2025 Ressa, Eugenio; Marchisio, Alberto; Martina, Maurizio; Masera, Guido; Shafique, Muhammad
TYRCA: A RISC-V Tightly-Coupled Accelerator for Code-Based Cryptography
2025 Dolmeta, Alessandra; Di Matteo, Stefano; Valea, Emanuele; Carmona, Mikael; Loiseau, Antoine; Martina, Maurizio; Masera, Guido
Implementation and integration of NTT/INTT accelerator on RISC-V for CRYSTALS-Kyber
2024 Dolmeta, Alessandra; Valpreda, Emanuele; Martina, Maurizio; Masera, Guido
LOKI Low-Latency Open-Source Kyber-Accelerator IPs
2024 Dolmeta, Alessandra; Mirigaldi, Mattia; Martina, Maurizio; Masera, Guido
Seeing Beyond the Order: a LEN5 to Sharpen Edge Microprocessors with Dynamic Scheduling
2024 Caon, Michele; Petrolo, Vincenzo; Mirigaldi, Mattia; Guella, Flavia; Masera, Guido; Martina, Maurizio
TEMET: Truncated REconfigurable Multiplier with Error Tuning
2024 Guella, Flavia; Valpreda, Emanuele; Caon, Michele; Masera, Guido; Martina, Maurizio
A Side channel attack methodology applied to Code-Based Post Quantum Cryptography
2023 Koleci, Kristjane; Cecchetti, Lorenzo; Ruo Roch, Massimo; Martina, Maurizio; Masera, Guido
ERODE: Error Resilient Object DetEction by Recovering Bounding Box and Class Information
2023 Valpreda, Emanuele; Palumbo, Giuseppe; Caon, Michele; Masera, Guido; Martina, Maurizio
Hardware architecture for CRYSTALS-Kyber post-quantum cryptographic SHA-3 primitives
2023 Dolmeta, Alessandra; Martina, Maurizio; Masera, Guido
Implementation and integration of Keccak accelerator on RISC-V for CRYSTALS-Kyber
2023 Dolmeta, Alessandra; Mirigaldi, Mattia; Martina, Maurizio; Masera, Guido
RISC-V Processor Technologies for Aerospace Applications in the ISOLDE Project
2023 Fornaciari, W.; Reghenzani, F.; Agosta, G.; Zoni, D.; Galimberti, A.; Conti, F.; Tortorella, Y.; Parisi, E.; Barchi, F.; Bartolini, A.; Acquaviva, A.; Gregori, D.; Cognetta, S.; Ciancarelli, C.; Leboffe, A.; Serri, P.; Burrello, A.; Jahier Pagliari, D.; Urgese, G.; Martina, M.; Masera, G.; Di Carlo, R.; Sciarappa, A.
| Citazione | Data di pubblicazione | Autori | File |
|---|---|---|---|
| CIRCE CROSS Integrated RISC-V Cryptographic Extension / Dolmeta, A., Piscopo, V., Martina, M., Masera, G.. - ELETTRONICO. - (2026), pp. 1-3. (2026 Design, Automation & Test in Europe Conference (DATE) Verona (Ita) 20 - 23 April 2026) [10.23919/date69613.2026.11539337]. | 1-gen-2026 | Dolmeta, AlessandraPiscopo, ValeriaMartina, MaurizioMasera, Guido | CIRCE_CROSS_Integrated_RISC-V_Cryptographic_Extension.pdf; DATE_extended_abstract.pdf |
| Compact Yet Fast: An Efficient d-Order Masked Implementation of Ascon / Mirigaldi, M., Paninforni, N., Martina, M., Masera, G.. - ELETTRONICO. - (2026). (2026 Design, Automation & Test in Europe Conference (DATE) Verona (Ita) 20 - 22 Aprile 2026) [10.23919/date69613.2026.11539534]. | 1-gen-2026 | Mirigaldi, MattiaPaninforni, NicoMartina, MaurizioMasera, Guido | 878.pdf; DATE_ASCON_paper-1.pdf |
| A Deep Dive into Integration Methodologies in RISC-V / Piscopo, V., Dolmeta, A., Mirigaldi, M., Martina, M., Masera, G.. - ELETTRONICO. - (2025), pp. 30-33. (22nd ACM International Conference on Computing Frontiers Cagliari (Ita) May 28-30, 2025) [10.1145/3706594.3726969]. | 1-gen-2025 | Piscopo, ValeriaDolmeta, AlessandraMirigaldi, MattiaMartina, MaurizioMasera, Guido | 3706594-3726969.pdf |
| CHIMERA: Cryptographic Hardware for Integrated Multipurpose Engine on RISC-V with ASCON / Dolmeta, A., Piscopo, V., Martina, M., Masera, G.. - ELETTRONICO. - 1:(2025), pp. 1-6. (IEEE Computer Society Annual Symposium on VLSI Kalamata (Gre) July 6-9, 2025) [10.1109/ISVLSI65124.2025.11130264]. | 1-gen-2025 | Dolmeta,AlessandraPiscopo,ValeriaMartina,MaurizioMasera,Guido | 25_ISVLSI.pdf; CHIMERA_Cryptographic_Hardware_for_Integrated_Multipurpose_Engine_on_RISC-V_with_ASCON.pdf |
| Exploring the New CV-X-IF Interface to Customize RISC-V Instruction Sets: A Case of Study in Cryptography / Dolmeta, A., Martina, M., Masera, G.. - ELETTRONICO. - 1369:(2025), pp. 39-47. (Applications in Electronics Pervading Industry, Environment and Society, APPLEPIES Torino (Ita) 19-20 September 2024) [10.1007/978-3-031-84100-2_5]. | 1-gen-2025 | Dolmeta, AlessandraMartina, MaurizioMasera, Guido | - |
| Just TestIt! An SBST Approach To Automate System-Integration Testing / Terzano, T., Giuffrida, L., Sapriza, J., Schiavone, P.D., Masera, G., Atienza, D., Lavagno, L., Martina, M.. - (2025), pp. 74-77. (22nd ACM International Conference on Computing Frontiers Cagliari (Ita) May 28–30, 2025) [10.1145/3706594.3726980]. | 1-gen-2025 | Terzano, TommasoGiuffrida, LuigiMasera, GuidoAtienza, DavidLavagno, LucianoMartina, Maurizio + | ACM_OSHW25___TestIt.pdf; 3706594.3726980.pdf |
| Performance Comparison: Software vs. Hardware Implementation of Novel S-Box Designed to Resist Power Analysis Attack / Mirigaldi, M., Martina, M., Masera, G.. - ELETTRONICO. - (2025), pp. 19-27. (Applications in Electronics Pervading Industry, Environment and Society, APPLEPIES Torino (Ita) 19-20 September 2024) [10.1007/978-3-031-84100-2_3]. | 1-gen-2025 | Mirigaldi, MattiaMartina, MaurizioMasera, Guido | Performance_Comparison__Software_vs__Hardware_Implementation_of_Novel_S_Box_Designed_to_Resist_Power_Analysis_Attack.pdf; versione_editoriale_compressed.pdf |
| Power Side-Channel Vulnerabilities of a RISC-V Cryptography Accelerator Integrated into CVA6 via Core-V eXtension Interface (CV-X-IF) / Farnaghinejad, B., Bellizia, D., Dolmeta, A., Masera, G., Porsia, A., Ruospo, A., Di Carlo, S., Savino, A., Sanchez, E.. - (2025), pp. 233-242. (International Test Conference 2025 San Diego, California (USA) September 20-26, 2025) [10.1109/ITC58126.2025.00030]. | 1-gen-2025 | Behnam FarnaghinejadAlessandra DolmetaGuido MaseraAntonio PorsiaAnnachiara RuospoStefano Di CarloAlessandro SavinoErnesto Sanchez + | ITC2025___Power_Side_Channel_Vulnerabilities_of_a_RISC_V_Cryptography_Accelerator_Integrated_into_CVA6_via_CV_X_IF.pdf; Power_Side-Channel_Vulnerabilities_of_a_RISC-V_Cryptography_Accelerator_Integrated_into_CVA6_via_Core-V_eXtension_Interface_CV-X-IF.pdf |
| RISC-V Based Keccak Co-Processor for NIST Post-Quantum Cryptography Standards / Dolmeta, A., Piscopo, V., Mirigaldi, M., Martina, M., Masera, G.. - ELETTRONICO. - (2025), pp. 1-5. (2025 IEEE International Symposium on Circuits and Systems Londra (UK) May 25-28, 2025) [10.1109/iscas56072.2025.11043433]. | 1-gen-2025 | Dolmeta, AlessandraPiscopo, ValeriaMirigaldi, MattiaMartina, MaurizioMasera, Guido | RISC-V_Based_Keccak_Co-Processor_for_NIST_Post-Quantum_Cryptography_Standards.pdf; ISCAS2025 (1).pdf |
| TinyCL: An Efficient Hardware Architecture for Continual Learning on Autonomous Systems / Ressa, E., Marchisio, A., Martina, M., Masera, G., Shafique, M.. - ELETTRONICO. - (2025), pp. 1-7. (2025 International Joint Conference on Neural Networks (IJCNN) Rome (Ita) 30 giugno - 5 luglio 2025) [10.1109/ijcnn64981.2025.11228478]. | 1-gen-2025 | Martina, MaurizioMasera, Guido + | TinyCL.pdf; IJCNN_25_TinyCL_pdfexpress.pdf |
| TYRCA: A RISC-V Tightly-Coupled Accelerator for Code-Based Cryptography / Dolmeta, A., Di Matteo, S., Valea, E., Carmona, M., Loiseau, A., Martina, M., Masera, G.. - ELETTRONICO. - (2025), pp. 1-7. (2025 Design, Automation & Test in Europe Conference (DATE) Lyon (Fra) 31 March - 2 April 2025) [10.23919/date64628.2025.10993202]. | 1-gen-2025 | Dolmeta, AlessandraValea, EmanueleMartina, MaurizioMasera, Guido + | 9_TYRCA_DATE.pdf; TYRCA_A_RISC-V_Tightly-Coupled_Accelerator_for_Code-Based_Cryptography.pdf |
| Implementation and integration of NTT/INTT accelerator on RISC-V for CRYSTALS-Kyber / Dolmeta, A., Valpreda, E., Martina, M., Masera, G.. - ELETTRONICO. - 1:(2024), pp. 59-62. (Proceedings of the 21st ACM International Conference on Computing Frontiers Workshops and Special Sessions Ischia (Italy) May 7-9, 2024) [10.1145/3637543.3652872]. | 1-gen-2024 | Dolmeta, AlessandraValpreda, EmanueleMartina, MaurizioMasera, Guido | 3637543.3652872.pdf; ACM_OSHW2.pdf |
| LOKI Low-Latency Open-Source Kyber-Accelerator IPs / Dolmeta, A., Mirigaldi, M., Martina, M., Masera, G.. - ELETTRONICO. - 1110:(2024), pp. 29-35. (ApplePies 2023 : International Conference on Applications in Electronics Pervading Industry, Environment and Society Genova, Italy September 28-29, 2023) [10.1007/978-3-031-48121-5_4]. | 1-gen-2024 | Dolmeta, AlessandraMirigaldi, MattiaMartina, MaurizioMasera, Guido | Applepies_2023_preprint.pdf; Masera-LOKI.pdf |
| Seeing Beyond the Order: a LEN5 to Sharpen Edge Microprocessors with Dynamic Scheduling / Caon, M., Petrolo, V., Mirigaldi, M., Guella, F., Masera, G., Martina, M.. - ELETTRONICO. - (2024), pp. 47-50. (21st ACM International Conference on Computing Frontiers Ischia (Italy) May 7 - 9, 2024) [10.1145/3637543.3652880]. | 1-gen-2024 | Caon, MichelePetrolo, VincenzoMirigaldi, MattiaGuella, FlaviaMasera, GuidoMartina, Maurizio | published-paper.pdf; main.pdf |
| TEMET: Truncated REconfigurable Multiplier with Error Tuning / Guella, F., Valpreda, E., Caon, M., Masera, G., Martina, M.. - ELETTRONICO. - 1110:(2024), pp. 370-377. (International Conference on Applications in Electronics Pervading Industry, Environment and Society Genova, Italy 28-29 September 2023) [10.1007/978-3-031-48121-5_53]. | 1-gen-2024 | Guella, FlaviaValpreda, EmanueleCaon, MicheleMasera, GuidoMartina, Maurizio | temet_final.pdf; Applepies_2023.pdf |
| A Side channel attack methodology applied to Code-Based Post Quantum Cryptography / Koleci, K., Cecchetti, L., Ruo Roch, M., Martina, M., Masera, G.. - ELETTRONICO. - 1036:(2023), pp. 90-96. (International Conference on Applications in Electronics Pervading Industry, Environment and Society Genova, Italy 26-27 September, 2022) [10.1007/978-3-031-30333-3_12]. | 1-gen-2023 | Koleci, KristjaneRuo Roch, MassimoMartina, MaurizioMasera, Guido + | Apple_Pies___article__camera_ready_.pdf; Koleci-ASideChannel.pdf |
| ERODE: Error Resilient Object DetEction by Recovering Bounding Box and Class Information / Valpreda, E., Palumbo, G., Caon, M., Masera, G., Martina, M.. - ELETTRONICO. - (2023), pp. 277-280. (18th International Conference on PhD Research in Microelectronics and Electronics Valencia (Spain) 18-21 June 2023) [10.1109/PRIME58259.2023.10161894]. | 1-gen-2023 | Valpreda, EmanueleCaon, MicheleMasera, GuidoMartina, Maurizio + | erode_prime2023_final_private.pdf; Valpreda-Erode.pdf |
| Hardware architecture for CRYSTALS-Kyber post-quantum cryptographic SHA-3 primitives / Dolmeta, A., Martina, M., Masera, G.. - ELETTRONICO. - (2023), pp. 209-212. (2023 18th Conference on Ph.D Research in Microelectronics and Electronics (PRIME) Valencia, Spain 18-21 June 2023) [10.1109/PRIME58259.2023.10161780]. | 1-gen-2023 | Dolmeta, AlessandraMartina, MaurizioMasera, Guido | Hardware_architecture_for_CRYSTALS-Kyber_post-quantum_cryptographic_SHA-3_primitives.pdf; PRIME_conference.pdf |
| Implementation and integration of Keccak accelerator on RISC-V for CRYSTALS-Kyber / Dolmeta, A., Mirigaldi, M., Martina, M., Masera, G.. - ELETTRONICO. - (2023), pp. 381-382. (Proceedings of the 20th ACM International Conference on Computing Frontiers Bologna, Italy 9-11 maggio 2023) [10.1145/3587135.3591432]. | 1-gen-2023 | Alessandra DolmetaMattia MirigaldiMaurizio MartinaGuido Masera | CF23_OSHW.pdf; Masera-Implementation.pdf |
| RISC-V Processor Technologies for Aerospace Applications in the ISOLDE Project / Fornaciari, W., Reghenzani, F., Agosta, G., Zoni, D., Galimberti, A., Conti, F., Tortorella, Y., Parisi, E., Barchi, F., Bartolini, A., Acquaviva, A., Gregori, D., Cognetta, S., Ciancarelli, C., Leboffe, A., Serri, P., Burrello, A., Jahier Pagliari, D., Urgese, G., Martina, M., et al.. - 14385:(2023), pp. 363-378. (23rd International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2023 Samos (GRC) July 2–6, 2023) [10.1007/978-3-031-46077-7_24]. | 1-gen-2023 | Burrello A.Jahier Pagliari D.Urgese G.Martina M.Masera G.Sciarappa A. + | SAMOS+2023+paper+ISOLDEpdf.pdf |