2026-09-21T12:14:40Zhttps://iris.polito.it/oai/requestoai:iris.polito.it:11583/30110672026-05-26T09:11:30Zcom_11583_2614433com_11583_2614425col_11583_2614423
New techniques for the Reliability Evaluation of AI-oriented Hardware Accelerators
LIMAS SIERRA, ROBERT ALEXANDER
Limas Sierra, Robert Alexander
SONZA REORDA, MATTEO
RODRIGUEZ CONDIA, JOSIE ESTEBAN
Artificial Intelligence
Hardware accelerator
Fault injection
Tensor Core
GPU computing
Matrix multiplication
Machine learning
Neural Network
Numerical format
Floating-point arithmetic
Posit arithmetic
Silent Data Corruption
Cross-layer reliability
Error modeling
Selective hardening
Software-based fault tolerance
Safety-critical system
High-performance computing.
Settore IINF-05/A - Sistemi di elaborazione delle informazioni
L'abstract è presente nell'allegato / the abstract is in the attachment
2026-05-08
info:eu-repo/semantics/doctoralThesis
https://hdl.handle.net/11583/3011067
eng
firstpage:1
lastpage:109
numberofpages:109
info:eu-repo/semantics/openAccess
Politecnico di Torino
country:Italy
license:Creative commons
license:Creative commons
license uri:http://creativecommons.org/licenses/by-nc-nd/4.0/
license uri:http://creativecommons.org/licenses/by-nc-nd/4.0/