2026-09-24T21:44:39Zhttps://iris.polito.it/oai/request

oai:iris.polito.it:11583/24968782023-05-16T21:50:15Zcom_11583_2614433com_11583_2614425col_11583_2614423

Digital Signal Processing on FPGA for Short-Range Optical Communications Systems over Plastic Optical Fiber RAMIREZ MOLINA, JULIO CESAR RAMIREZ MOLINA, JULIO CESAR Settore ING-INF/03 - Telecomunicazioni Nowadays bandwidth requirements are increasing vertiginously. As new ways and concepts of how to share information emerge, new ways of how to access the web enter the market. Computers and mobile devices are only the beginning, the spectrum of web products and services such as IPTV, VoIP, on-line gaming, etc has been augmented by the possibility to share, store data, interact and work on the Cloud. The rush for bandwidth has led researchers from all over the world to enquire themselves on how to achieve higher data rates, and it is thanks to their efforts, that both long-haul and short-range communications systems have experienced a huge development during the last few years. However, as the demand for higher information throughput increases traditional short-range solutions reach their lim- its. As a result, optical solutions are now migrating from long-haul to short-range communication systems. As part of this trend, plastic optical fiber (POF) systems have arisen as promising candidates for applications where traditional glass optical fibers (GOF) are unsuitable. POF systems feature a series of characteristics that make them very suitable for the market requirements. More in detail, these systems are low cost, robust, easy to handle and to install, flexible and yet tolerant to bendings. Nonetheless, these features come at the expense of a considerable higher bandwidth limitation when compared to GOF systems. This thesis is aimed to the investigate the use of digital signal processing (DSP) algorithms to overcome the bandwidth limitation in short-range optical communications system based on POF. In particular, this dissertation presents the design and development of DSP algorithms on field programmable gate arrays (FPGAs) with the ultimate purpose of implementing a fully engineered 1Gbit/s Ethernet Media Converter capable of establishing data links over 50+ meters of PMMA-SI POF using an RC-LED as transmitter. 2012 info:eu-repo/semantics/doctoralThesis http://hdl.handle.net/11583/2496878 10.6092/polito/porto/2496878 eng numberofpages:108 info:eu-repo/semantics/openAccess Politecnico di Torino country:Italy license:Creative commons license uri:http://creativecommons.org/licenses/by/3.0/it/