Single-ended to differential output converter for a 4-Channel front-end integrated circuit in liquid argon

This work contains the structure and transistor-level design of CMOS single-ended to differential-ended converter for the front-end integrated circuit. The front-end is used to readout large area SiPM at LAr temperature (87 K). The converter circuit, a fully-differential amplifier and two non-inverter amplifiers, was implemented using a standard 110 nm CMOS technology. Fully differential stage was designed using a Folded Cascode Operational Trans-impedance Amplifier (OTA) with a common mode feedback, a power rail of +1.25 V and -1.25 V, a power consumption of 20 mW and an unity gain in closed-loop. The converter circuit is connected, on the input, to a front-end integrated circuit. The front-end readout a SiPM tile of 24 cm2 produced in the Darkside collaboration project. The circuit converts a single-ended signal, with a peaking time of 250 ns, a timing jitter of 10 ns and SNR larger than 10, into a differential output.