In this paper, we present an automated strategy for extracting behavioral small-signal macromodels of biased nonlinear circuit blocks. We discuss in detail the case study of a Low DropOut (LDO) voltage regulator, which is an essential part of the power distribution network in electronic systems. We derive a compact yet accurate surrogate model of the LDO, which enables fast transient power integrity simulations, including all parasitics due to the specific layout of the LDO realization. The model is parameterized through its DC input voltage and its output current and is thus available as a SPICE netlist. Numerical experiments show that a speedup up to 700X is achieved when replacing the extracted post-layout netlist with the surrogate model, with practically no loss in accuracy.

Enabling fast power integrity transient analysis through parameterized small-signal macromodels / Bradde, T.; Toledo, P.; De Stefano, M.; Zanco, A.; Grivet-Talocia, S.; Crovetti, P.. - ELETTRONICO. - (2019), pp. 759-764. (Intervento presentato al convegno 2019 International Symposium on Electromagnetic Compatibility - EMC EUROPE tenutosi a Barcelona, Spain nel 2-6 September 2019) [10.1109/EMCEurope.2019.8871828].

Enabling fast power integrity transient analysis through parameterized small-signal macromodels

Bradde, T.;Toledo, P.;De Stefano, M.;Zanco, A.;Grivet-Talocia, S.;Crovetti, P.
2019

Abstract

In this paper, we present an automated strategy for extracting behavioral small-signal macromodels of biased nonlinear circuit blocks. We discuss in detail the case study of a Low DropOut (LDO) voltage regulator, which is an essential part of the power distribution network in electronic systems. We derive a compact yet accurate surrogate model of the LDO, which enables fast transient power integrity simulations, including all parasitics due to the specific layout of the LDO realization. The model is parameterized through its DC input voltage and its output current and is thus available as a SPICE netlist. Numerical experiments show that a speedup up to 700X is achieved when replacing the extracted post-layout netlist with the surrogate model, with practically no loss in accuracy.
2019
978-1-7281-0594-9
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2762652
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