Archivio Istituzionale della RicercaIn this paper is presented the electronic design of a wearable electrocardiograph (ECG) circuit considering a two-electrodes ground free optimized model, a collection of hardware filters to reduce RF interference and a Driven-Right-Leg Circuit Design to improve the Common-Mode Rejection. Nowadays, large attention is given to the development of innovative wearable system able to monitor physio-pathological parameters of individuals. Heart disease remains the leading killer of adults over age 65. This paper presents some innovative hardware solutions to implement a low cost, high performance and user friendly device.
Hardware design of a wearable ECG-sensor: Strategies implementation for improving CMRR and reducing noise / Lacirignola, Federica; Pasero, Eros. - ELETTRONICO. - (2017), pp. 1-4. (Intervento presentato al convegno 2017 European Conference on Circuit Theory and Design, ECCTD 2017 tenutosi a ita nel 2017) [10.1109/ECCTD.2017.8093244].
Hardware design of a wearable ECG-sensor: Strategies implementation for improving CMRR and reducing noise
Lacirignola, Federica;Pasero, Eros
2017
Abstract
In this paper is presented the electronic design of a wearable electrocardiograph (ECG) circuit considering a two-electrodes ground free optimized model, a collection of hardware filters to reduce RF interference and a Driven-Right-Leg Circuit Design to improve the Common-Mode Rejection. Nowadays, large attention is given to the development of innovative wearable system able to monitor physio-pathological parameters of individuals. Heart disease remains the leading killer of adults over age 65. This paper presents some innovative hardware solutions to implement a low cost, high performance and user friendly device.
Pubblicazioni consigliate
I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
https://hdl.handle.net/11583/2697260
Attenzione
Attenzione! I dati visualizzati non sono stati sottoposti a validazione da parte dell'ateneo