Archivio Istituzionale della RicercaWe describe the implementation on FPGA platform of the Digital Signal Processing required by the PON architecture proposed by the FABULOUS European Project, comparing the results with off-line processing and evaluating the related ASIC requirements.
DSP for FDMA Passive Optical Network: real-time implementation / Abrate, Silvio; Straullu, Stefano; Savio, Paolo; Nespola, Antonino; Ferrero, Valter; Gaudino, Roberto. - ELETTRONICO. - (2016), p. SpM2E.6. (Intervento presentato al convegno Advanced Photonics 2016 tenutosi a Vancouver, Canada nel 18–20 July 2016) [10.1364/SPPCOM.2016.SpM2E.6].
DSP for FDMA Passive Optical Network: real-time implementation
FERRERO, Valter;GAUDINO, ROBERTO
2016
Abstract
We describe the implementation on FPGA platform of the Digital Signal Processing required by the PON architecture proposed by the FABULOUS European Project, comparing the results with off-line processing and evaluating the related ASIC requirements.
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https://hdl.handle.net/11583/2671524
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