Archivio Istituzionale della RicercaGeneral purpose graphics processing units (GPGPUs) have recently been explored as a new computing paradigm for accelerating compute-intensive EDA applications. Such massively parallel architectures have been applied in accelerating the simulation of digital designs during several phases of their development – corresponding to different abstraction levels, specifically: (i) gate-level netlist descriptions, (ii) register-transfer level and (iii) transaction-level descriptions. This embedded tutorial presents a comprehensive analysis of the best results obtained by adopting GP-GPUs in all these EDA applications.
On the Use of GP-GPUs for Accelerating Compute-intensive EDA Applications / V., Bertacco; D., Chatterjee; N., Bombieri; F., Fummi; Vinco, Sara; A. M., Kaushik; H. D., Patel. - (2013), pp. 1357-1366. (Intervento presentato al convegno ACM/IEEE Design, Automation and Test in Europe (DATE) tenutosi a Grenoble, France nel 18-22 March) [10.7873/DATE.2013.279].
On the Use of GP-GPUs for Accelerating Compute-intensive EDA Applications
VINCO, SARA;
2013
Abstract
General purpose graphics processing units (GPGPUs) have recently been explored as a new computing paradigm for accelerating compute-intensive EDA applications. Such massively parallel architectures have been applied in accelerating the simulation of digital designs during several phases of their development – corresponding to different abstraction levels, specifically: (i) gate-level netlist descriptions, (ii) register-transfer level and (iii) transaction-level descriptions. This embedded tutorial presents a comprehensive analysis of the best results obtained by adopting GP-GPUs in all these EDA applications.
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https://hdl.handle.net/11583/2529493
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