Testing NAND flash memories is a very complex issue due to the rapid scaling down of the technology and the related floating gate reliability issues: as a consequence a complete and technology independent test is needed. Several faults and disturbances were identified both for NOR and NAND flash memories: however they has never been considered together as a whole. In this work we analyze all the possible fault models for NAND flash memories: thus we define a comprehensive and technology independent fault model for NAND Flash memories, for which a simple but comprehensive test method is presented.

Exploring modeling and testing of NAND flash memories / DI CARLO, Stefano; Fabiano, M.; Piazza, R.; Prinetto, Paolo Ernesto. - ELETTRONICO. - (2010), pp. 47-50. (Intervento presentato al convegno IEEE East-West Design & Test Symposium (EWDTS) tenutosi a St. Petersburg, RU nel 17-20 Sept. 2010) [10.1109/EWDTS.2010.5742059].

Exploring modeling and testing of NAND flash memories

DI CARLO, STEFANO;PRINETTO, Paolo Ernesto
2010

Abstract

Testing NAND flash memories is a very complex issue due to the rapid scaling down of the technology and the related floating gate reliability issues: as a consequence a complete and technology independent test is needed. Several faults and disturbances were identified both for NOR and NAND flash memories: however they has never been considered together as a whole. In this work we analyze all the possible fault models for NAND flash memories: thus we define a comprehensive and technology independent fault model for NAND Flash memories, for which a simple but comprehensive test method is presented.
2010
9781424495559
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2379482
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