Archivio Istituzionale della RicercaRODRIGUEZ CONDIA, JOSIE ESTEBAN
RODRIGUEZ CONDIA, JOSIE ESTEBAN
Dipartimento di Automatica e Informatica
Josie E. R. Condia; Josie E. Rodriguez Condia; JER Condia
046136
ACELERÓGRAFO TRIAXIAL PORTÁTIL QUE COMPRENDE UN RECEPTOR DE TRAMAS NMEA-GPS
2014 rodriguez condia, josie e.; PEREZ HOLGUIN, WILSON JAVIER
High & low-level features modelling of nodes in WSNs using SystemC
2016 Condia, Josie E. Rodriguez; Holguin, Wilson Javier Perez
EQUIPO DESCENTRALIZADO DE PROSPECCIÓN GEOELÉCTRICA DE NODOS RECONFIGURABLES
2018 rodriguez condia, Josie; PEREZ HOLGUIN, Javier
About the functional test of the GPGPU scheduler
2018 Du, B.; RODRIGUEZ CONDIA, JOSIE ESTEBAN; Sonza Reorda, M.; Sterpone, L.
On the evaluation of SEU effects in GPGPUs
2019 Du, B.; Rodriguez Condia, Josie E.; Sonza Reorda, M.; Sterpone, L.
Untestable faults identification in GPGPUs for safety-critical applications
2019 Condia, Josie E. Rodriguez; Da Silva, Felipe A.; Hamdioui, S.; Sauer, C.; Reorda, M. Sonza
On the in-field test of the GPGPU scheduler memory
2019 Di Carlo, Stefano; Condia, Josie E. Rodriguez; Sonza Reorda, Matteo
An extended model to support detailed GPGPU reliability analysis
2019 Du, B.; RODRIGUEZ CONDIA, JOSIE ESTEBAN; Reorda, M. S.
Testing permanent faults in pipeline registers of GPGPUs: A multi-kernel approach
2019 SONZA REORDA, Matteo; Rodriguez Condia Josie, E.
An open source embedded-GPGPU model for the accurate analysis and mitigation of SEU effects
2019 Du, B.; Rodriguez Condia, Josie E.; Sonza Reorda, M.; Sterpone, L.
Programmers manual FlexGripPlus SASS SM 1.0
2020 Rodriguez Condia, Josie Esteban; Du, Boyang; Roascio, Gianluca; Scie, Edouard; Guerrero Balaguera, Juan David
An on-line testing technique for the scheduler memory of a GPGPU
2020 Di Carlo, Stefano; Condia, Josie E. Rodriguez; Reorda, Matteo Sonza
On the testing of special memories in GPGPUs
2020 Rodriguez Condia, Josie E.; Reorda, Matteo Sonza
FlexGripPlus: An improved GPGPU model to support reliability analysis
2020 Rodriguez Condia, Josie E.; Du, Boyang; Sonza Reorda, Matteo; Sterpone, Luca
Testing the Divergence Stack Memory on GPGPUs: A Modular in-Field Test Strategy
2020 Rodriguez Condia, Josie Esteban; Sonza Reorda, M.
Design and Verification of an open-source SFU model for GPGPUs
2020 Rodriguez Condia Josie, Esteban.; Guerrero-Balaguera, Juan-David; Moreno-Manrique, C. -F.; Reorda, M. S.
A dynamic reconfiguration mechanism to increase the reliability of GPGPUs
2020 Rodriguez Condia, Josie E.; Narducci, Pierpaolo; Reorda, M. Sonza; Sterpone, L.
Design techniques to improve the resilience of computing systems: software layer
2020 Bosio, Alberto; Di Carlo, Stefano; Di Natale, Giorgio; Sonza Reorda, Matteo; Rodriguez Condia, Josie E.
A dynamic hardware redundancy mechanism for the in-field fault detection in cores of GPGPUs
2020 Rodriguez Condia, Josie E.; Narducci, Pierpaolo; Reorda, M. Sonza; Sterpone, L.
Evaluating Software-based Hardening Techniques for General-Purpose Registers on a GPGPU
2020 Goncalves, Marcio M.; Azambuja, Jose Rodrigo; Rodriguez Condia, Josie E.; Sonza Reorda, Matteo; Sterpone, Luca
| Citazione | Data di pubblicazione | Autori | File |
|---|---|---|---|
| ACELERÓGRAFO TRIAXIAL PORTÁTIL QUE COMPRENDE UN RECEPTOR DE TRAMAS NMEA-GPS / rodriguez condia, josie e.; PEREZ HOLGUIN, WILSON JAVIER. - (2014). | 1-gen-2014 | rodriguez condia, josie e. + | Resolución Concesión de Patente.pdf |
| High & low-level features modelling of nodes in WSNs using SystemC / Condia, Josie E. Rodriguez; Holguin, Wilson Javier Perez. - ELETTRONICO. - (2016), pp. 1-6. (Intervento presentato al convegno 2016 IEEE 36th Central American and Panama Convention (CONCAPAN XXXVI) tenutosi a San jose, Costa Rica nel 9-11 Nov. 2016) [10.1109/CONCAPAN.2016.7942353]. | 1-gen-2016 | Condia, Josie E. Rodriguez + | paper.pdf |
| EQUIPO DESCENTRALIZADO DE PROSPECCIÓN GEOELÉCTRICA DE NODOS RECONFIGURABLES / rodriguez condia, Josie; PEREZ HOLGUIN, Javier. - (2018). | 1-gen-2018 | rodriguez condia, josie + | 1156-P RTA FONDO1-1.pdf |
| About the functional test of the GPGPU scheduler / Du, B.; RODRIGUEZ CONDIA, JOSIE ESTEBAN; Sonza Reorda, M.; Sterpone, L.. - ELETTRONICO. - (2018). (Intervento presentato al convegno 24th IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2018) tenutosi a Hotel Cap Roig, Platja d’Aro, Costa Brava, Spain nel July 2-4, 2018) [10.1109/IOLTS.2018.8474174]. | 1-gen-2018 | B. DuRODRIGUEZ CONDIA, JOSIE ESTEBANM. Sonza ReordaL. Sterpone | IOLTS18 v Camera Ready.pdf; About_the_functional_test_of_the_GPGPU_scheduler.pdf |
| On the evaluation of SEU effects in GPGPUs / Du, B.; Rodriguez Condia, Josie E.; Sonza Reorda, M.; Sterpone, L.. - ELETTRONICO. - (2019), pp. 1-6. (Intervento presentato al convegno 2019 IEEE Latin American Test Symposium (LATS) tenutosi a Santiago, Chile nel 11-13 March 2019) [10.1109/LATW.2019.8704643]. | 1-gen-2019 | Du, B.Rodriguez Condia, Josie E.Sonza Reorda, M.Sterpone, L. | - |
| Untestable faults identification in GPGPUs for safety-critical applications / Condia, Josie E. Rodriguez; Da Silva, Felipe A.; Hamdioui, S.; Sauer, C.; Reorda, M. Sonza. - ELETTRONICO. - (2019), pp. 570-573. (Intervento presentato al convegno 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS) tenutosi a Genova nel 27-29 Nov. 2019) [10.1109/ICECS46596.2019.8964677]. | 1-gen-2019 | Condia, Josie E. RodriguezHamdioui, S.Reorda, M. Sonza + | camera ready version.pdf; 08964677.pdf |
| On the in-field test of the GPGPU scheduler memory / Di Carlo, Stefano; Condia, Josie E. Rodriguez; Sonza Reorda, Matteo. - STAMPA. - (2019), pp. 1-6. (Intervento presentato al convegno IEEE 22nd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) tenutosi a Cluj-Napoca, (Romania) nel 24-26 April 2019) [10.1109/DDECS.2019.8724672]. | 1-gen-2019 | Di Carlo, StefanoCondia, Josie E. RodriguezSonza Reorda, Matteo | camera ready.pdf |
| An extended model to support detailed GPGPU reliability analysis / Du, B.; RODRIGUEZ CONDIA, JOSIE ESTEBAN; Reorda, M. S.. - ELETTRONICO. - (2019), pp. 1-6. (Intervento presentato al convegno 14th IEEE International Conference on Design and Technology of Integrated Systems In Nanoscale Era, DTIS 2019 tenutosi a grc nel 2019) [10.1109/DTIS.2019.8735047]. | 1-gen-2019 | Du B.RODRIGUEZ CONDIA, JOSIE ESTEBANReorda M. S. | camera ready version.pdf |
| Testing permanent faults in pipeline registers of GPGPUs: A multi-kernel approach / SONZA REORDA, Matteo; Rodriguez Condia Josie, E.. - STAMPA. - (2019). (Intervento presentato al convegno 2019 IEEE 25th International Symposium on On-Line Testing And Robust System Design (IOLTS) tenutosi a Rhodes (Greece) nel 1-3 July 2019) [10.1109/IOLTS.2019.8854463]. | 1-gen-2019 | Sonza Reorda MatteoRodriguez Condia Josie E. | Camera_Ready_final.pdf; 08854463.pdf |
| An open source embedded-GPGPU model for the accurate analysis and mitigation of SEU effects / Du, B.; Rodriguez Condia, Josie E.; Sonza Reorda, M.; Sterpone, L.. - (2019), pp. 1-4. (Intervento presentato al convegno 2019 19th European Conference on Radiation and Its Effects on Components and Systems tenutosi a Montpellier (France) nel 16-20 September 2019) [10.1109/RADECS47380.2019.9745670]. | 1-gen-2019 | Du, B.Rodriguez Condia, Josie E.Sonza Reorda, M.Sterpone, L. | An_open_source_embedded-GPGPU_model_for_the_accurate_analysis_and_mitigation_of_SEU_effects.pdf |
| Programmers manual FlexGripPlus SASS SM 1.0 / Rodriguez Condia, Josie Esteban; Du, Boyang; Roascio, Gianluca; Scie, Edouard; Guerrero Balaguera, Juan David. - ELETTRONICO. - (2020), pp. 1-67. [10.5281/ZENODO.3819312] | 1-gen-2020 | Rodriguez Condia, Josie EstebanDu, BoyangRoascio, GianlucaGuerrero Balaguera, Juan David + | Programmers manual FlexGripPlus SASS.pdf |
| An on-line testing technique for the scheduler memory of a GPGPU / Di Carlo, Stefano; Condia, Josie E. Rodriguez; Reorda, Matteo Sonza. - In: IEEE ACCESS. - ISSN 2169-3536. - ELETTRONICO. - 8:1(2020), pp. 1-16893. [10.1109/ACCESS.2020.2968139] | 1-gen-2020 | Di Carlo, StefanoCondia, Josie E. RodriguezReorda, Matteo Sonza | 08963963-2.pdf |
| On the testing of special memories in GPGPUs / Rodriguez Condia, Josie E.; Reorda, Matteo Sonza. - ELETTRONICO. - (2020), pp. 1-6. (Intervento presentato al convegno 2020 IEEE 26th International Symposium on On-Line Testing and Robust System Design (IOLTS) tenutosi a Napoli, Italy nel 13-15 July 2020) [10.1109/IOLTS50870.2020.9159711]. | 1-gen-2020 | Rodriguez Condia, Josie E.Reorda, Matteo Sonza | camera ready.pdf; 09159711.pdf |
| FlexGripPlus: An improved GPGPU model to support reliability analysis / Rodriguez Condia, Josie E.; Du, Boyang; Sonza Reorda, Matteo; Sterpone, Luca. - In: MICROELECTRONICS RELIABILITY. - ISSN 0026-2714. - 109:(2020), pp. 1-14. [10.1016/j.microrel.2020.113660] | 1-gen-2020 | Rodriguez Condia, Josie E.Du, BoyangSonza Reorda, MatteoSterpone, Luca | journal-version-V20.pdf; 1-s2.0-S0026271419307978-main.pdf |
| Testing the Divergence Stack Memory on GPGPUs: A Modular in-Field Test Strategy / Rodriguez Condia, Josie Esteban; Sonza Reorda, M.. - ELETTRONICO. - (2020), pp. 153-158. (Intervento presentato al convegno 28th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SOC 2020 tenutosi a usa nel 5-7 Oct. 2020) [10.1109/VLSI-SOC46417.2020.9344088]. | 1-gen-2020 | Rodriguez Condia, Josie EstebanSonza Reorda, M. | paper open source.pdf; 09344088.pdf |
| Design and Verification of an open-source SFU model for GPGPUs / Rodriguez Condia Josie, Esteban.; Guerrero-Balaguera, Juan-David; Moreno-Manrique, C. -F.; Reorda, M. S.. - ELETTRONICO. - (2020), pp. 1-6. (Intervento presentato al convegno 17th Biennial Baltic Electronics Conference, BEC 2020 tenutosi a Tallin (Est) nel 2020) [10.1109/BEC49624.2020.9276748]. | 1-gen-2020 | Rodriguez Condia Josie Esteban.Guerrero-Balaguera Juan-DavidReorda M. S. + | 09276748.pdf |
| A dynamic reconfiguration mechanism to increase the reliability of GPGPUs / Rodriguez Condia, Josie E.; Narducci, Pierpaolo; Reorda, M. Sonza; Sterpone, L.. - ELETTRONICO. - (2020), pp. 1-6. (Intervento presentato al convegno 2020 IEEE 38th VLSI Test Symposium (VTS) tenutosi a San Diego, USA nel 5-8 April 2020) [10.1109/VTS48691.2020.9107572]. | 1-gen-2020 | Rodriguez Condia, Josie E.Reorda, M. SonzaSterpone, L. + | 09107572.pdf |
| Design techniques to improve the resilience of computing systems: software layer / Bosio, Alberto; Di Carlo, Stefano; Di Natale, Giorgio; Sonza Reorda, Matteo; Rodriguez Condia, Josie E. - In: Cross-Layer Reliability of Computing Systems / Di Natale G., Gizopoulos D., Di Carlo S., Bosio A. and Canal R.. - ELETTRONICO. - [s.l] : IET - the institution of engineering and technology, 2020. - ISBN 9781785617980. - pp. 95-112 [10.1049/PBCS057E_ch4] | 1-gen-2020 | Di Carlo, StefanoSonza Reorda, MatteoRodriguez Condia, Josie E. + | PBCS0570_DiNatale_Chapter04_Proof.pdf; I.4 - Software Layer.pdf |
| A dynamic hardware redundancy mechanism for the in-field fault detection in cores of GPGPUs / Rodriguez Condia, Josie E.; Narducci, Pierpaolo; Reorda, M. Sonza; Sterpone, L.. - ELETTRONICO. - (2020), pp. 1-6. (Intervento presentato al convegno 2020 23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) tenutosi a Novi Sad, Serbia, Serbia nel 22-24 April 2020) [10.1109/DDECS50862.2020.9095665]. | 1-gen-2020 | Rodriguez Condia, Josie E.Reorda, M. SonzaSterpone, L. + | 09095665.pdf |
| Evaluating Software-based Hardening Techniques for General-Purpose Registers on a GPGPU / Goncalves, Marcio M.; Azambuja, Jose Rodrigo; Rodriguez Condia, Josie E.; Sonza Reorda, Matteo; Sterpone, Luca. - ELETTRONICO. - (2020), pp. 1-6. (Intervento presentato al convegno 2020 IEEE Latin-American Test Symposium (LATS) tenutosi a Maceio, Brasil nel 30 March-2 April 2020) [10.1109/LATS49555.2020.9093682]. | 1-gen-2020 | Rodriguez Condia , Josie E.Sonza Reorda, MatteoSterpone, Luca + | LATS_2020_paper.pdf; 09093682.pdf |