statistiche ricercatore

statistiche per VIOLANTE, MASSIMO

Distribuzione geografica
Salva come PNG Salva come JPEG
Continente #
EU - Europa 27229
NA - Nord America 23711
AS - Asia 4295
AF - Africa 120
SA - Sud America 97
Continente sconosciuto - Info sul continente non disponibili 19
OC - Oceania 16
Totale 55487
Salva come PNG Salva come JPEG
Nazione #
US - Stati Uniti d'America 23499
IT - Italia 6568
GB - Regno Unito 6078
FR - Francia 5261
DE - Germania 3926
CN - Cina 2833
UA - Ucraina 1583
RU - Federazione Russa 1202
NL - Olanda 840
TR - Turchia 634
SE - Svezia 524
PL - Polonia 294
FI - Finlandia 221
KR - Corea 215
CA - Canada 202
IN - India 145
AT - Austria 106
JP - Giappone 98
EU - Europa 87
HK - Hong Kong 83
IR - Iran 80
ES - Italia 72
SN - Senegal 67
RO - Romania 59
BR - Brasile 54
MY - Malesia 45
PK - Pakistan 45
AP - ???statistics.table.value.countryCode.AP??? 34
ID - Indonesia 31
CH - Svizzera 30
PT - Portogallo 28
BE - Belgio 27
BG - Bulgaria 27
IL - Israele 25
GR - Grecia 24
IE - Irlanda 24
AE - Emirati Arabi Uniti 23
TW - Taiwan 23
EE - Estonia 22
VN - Vietnam 20
AM - Armenia 18
DK - Danimarca 18
CZ - Repubblica Ceca 17
AU - Australia 16
CL - Cile 16
NG - Nigeria 16
TH - Thailandia 16
LB - Libano 15
EG - Egitto 14
BY - Bielorussia 12
NO - Norvegia 11
GH - Ghana 8
MD - Moldavia 8
UY - Uruguay 8
HR - Croazia 7
HU - Ungheria 7
LU - Lussemburgo 7
SA - Arabia Saudita 7
PH - Filippine 6
RS - Serbia 6
AR - Argentina 5
CO - Colombia 5
MT - Malta 5
MX - Messico 5
SG - Singapore 5
VE - Venezuela 5
MA - Marocco 4
PE - Perù 4
SI - Slovenia 4
ZA - Sudafrica 4
BD - Bangladesh 3
CY - Cipro 3
KZ - Kazakistan 3
LV - Lettonia 3
SK - Slovacchia (Repubblica Slovacca) 3
SY - Repubblica araba siriana 3
AL - Albania 2
BZ - Belize 2
GE - Georgia 2
IQ - Iraq 2
JO - Giordania 2
LK - Sri Lanka 2
MO - Macao, regione amministrativa speciale della Cina 2
PA - Panama 2
SC - Seychelles 2
TN - Tunisia 2
AZ - Azerbaigian 1
BA - Bosnia-Erzegovina 1
CI - Costa d'Avorio 1
DO - Repubblica Dominicana 1
DZ - Algeria 1
KG - Kirghizistan 1
KW - Kuwait 1
MM - Myanmar 1
QA - Qatar 1
UZ - Uzbekistan 1
ZW - Zimbabwe 1
Totale 55487
Salva come PNG Salva come JPEG
Città #
Ashburn 7926
Southend 5704
Seattle 3401
Fairfield 2235
Torino 1666
Zhengzhou 1387
Woodbridge 1173
Houston 969
Cambridge 850
Wilmington 794
Jacksonville 783
Ann Arbor 753
Turin 655
Princeton 593
Hangzhou 562
Izmir 461
San Ramon 408
Saint Petersburg 387
Milan 357
Chicago 350
Boardman 308
San Donato Milanese 308
Bologna 298
Herkenbosch 273
Beijing 259
Kraków 256
Zaporozhye 206
Helsinki 205
Shanghai 200
Baltimore 196
Pennsylvania Furnace 189
Overberg 186
Mountain View 161
Monopoli 157
Waterloo 127
Padua 115
San Diego 101
Vienna 98
Malatya 91
Fremont 77
Redwood City 77
Amsterdam 75
New York 74
Frankfurt 66
Guangzhou 66
Lecce 65
Cedar Rapids 64
Rotterdam 60
Melun 59
Moscow 58
Buffalo 54
Atlanta 53
Paris 52
San Francisco 51
Putian 49
Rome 49
Shenzhen 49
Norwalk 47
Dearborn 44
Kwai Chung 43
Modena 39
Alba 37
Fuzhou 36
Las Vegas 32
Madrid 32
Podenzano 31
Overland Park 30
Central District 29
Dallas 28
Ningbo 28
Valdagno 28
Kornik 27
Seoul 27
Zhitomir 27
Vicenza 26
Columbus 25
Kocaeli 25
Kiev 24
Verona 24
Galati 23
Odessa 23
Sofia 23
Nanjing 21
Kansas City 20
Falls Church 19
Hefei 19
La Jolla 19
Redmond 19
Imola 18
Milano 18
Osaka 17
Nanchang 16
Shaoxing 16
Toronto 16
Toulouse 16
Xiamen 16
Amarillo 15
Formia 15
Hanoi 15
Stockport 15
Totale 37314
Salva come PNG Salva come JPEG
Nome #
A High-Level Approach to Analyze the Effects of Soft Errors on Lossless Compression Algorithms 1472
The EcoThermo project: key and innovative aspects 597
A Light-Weight Fault Tolerance Framework for Space Computing using COTS Components 573
Exploiting Logic Simulation to Improve Simulation-based Sequential ATPG 554
SymFony: a hybrid topological-symbolic ATPG exploiting RT-level information 542
A Hybrid Fault Injection Methodology for Real Time Systems 529
Exploiting symbolic techniques for partial scan flip flop selection 516
Early Power Estimation for System-on-Chip Designs 507
Simulation-based analysis of SEU effects on SRAM-based FPGAs 506
Prediction of Power Requirements for High-Speed Circuits 474
Speeding-up Fault Injection Campaigns in VHDL models 474
Exploiting HW Acceleration for Classifying Complex Test Program Generation Problems 466
Test Pattern Generation under Low Power Constraints 466
An adaptively reconfigurable computing framework for intelligent robotics 447
FPGA-based Fault Injection Techniques for Fast Evaluation of Fault Tolerance in VLSI Circuits 427
An On-board Data-Handling Computer for Deep-Space Exploration Built Using Commercial-Off-the-Shelf SRAM-Based FPGAs 392
Software and Hardware Techniques for SEU Detection in IP Processors 374
Combined software and hardware techniques for the design of reliable IP processors 361
Evaluation of error effects on a biomedical system 337
New techniques for improving the performance of the lockstep architecture for SEEs mitigation in FPGA embedded processors 334
Designing Autonomous Race Car Models for Learning Advanced Topics in Hard Real-Time System 321
Advanced technologies for transient faults detection and compensation 319
Implementing a safe embedded computing system in SRAM-based FPGAs using IP cores: A case study based on the Altera NIOS-II soft processor 319
A Novel Method for Online Detection of Faults Affecting Execution-Time in Multicore-Based Systems 317
Software-Implemented Hardware Fault Tolerance 317
A study of the Single Event Effects Impact on Functional Mapping within Flash-based FPGAs 317
Validating the Dependability of Embedded Systems through Fault Injection by Means of Loadable Kernel Modules 312
Mitigating Soft Errors in Processors Cores Embedded in System-on Programmable-Chips 307
Boosting Software Fault Injection for Dependability Analysis of Real-Time Embedded Applications 306
Reconfigurable Field Programmable Gate Arrays for Mission-Critical Applications 303
A New Mitigation Approach For Soft Errors In Embedded Processors 300
A Genetic Algorithm-based System for Generating Test Programs for Microprocessor IP Cores 299
Automatic Test Bench Generation for Simulation-based Validation 298
A new hybrid fault detection technique for systems-on-a-chip 296
A Local Analysis of the Genotype-Fitness Mapping in Hardware Optimization Problems 292
An In-Vehicle Infotainment Software Architecture Based on Google Android 291
Monte Carlo Analysis of the Effects of Soft Errors Accumulation in SRAM-based FPGAs 286
FPGA-based Fault Injection for Microprocessor Systems 285
A New Analytical Approach to Estimate the Effects of SEUs in TMR Architectures Implemented Through SRAM-based FPGAs 282
COTS-Based High-Performance Computing for Space Applications 278
Identification and classification of single-event upsets in the configuration memory of sram-based fpgas 277
A New Partial Reconfiguration-based Fault-Injection System to Evaluate SEU Effects in SRAM-based FPGAs 273
A new reliability-oriented place and route algorithm for SRAM-based FPGAs 271
A new FPGA-based edge detection system for the gridding of DNA microarray images 271
A new hardware/software platform for the soft-error sensitivity evaluation of FPGA devices 271
A New Software Tool for Static Analysis of SET Sensitiveness in Flash-based FPGAs 270
Coping with Obsolescence of Processor Cores in Critical Applications 269
An Hybrid Architecture for consolidating mixed criticality applications on multicore systems 268
Development of an automated test system for ECU software validation: an industrial experience 267
Low Power BIST via Non-Linear Hybrid Cellular Automata 266
Experimental Validation of Lockstep, Checkpoint, and Rollback Recovery to Detect and Correct Soft Errors in System-On-Programmable-Chips 266
A Low-Cost Solution for Deploying Processor Cores in Harsh Environments 264
Automatic generation of validation stimuli for application-specific processors 263
Hardware and Software Transparency in the Protection of Programs Against SEUs and SETs 260
An experimental evaluation of the effectiveness of automatic rule-based transformations for safety-critical applications 259
A new hardware architecture for performing the gridding of DNA microarray images 258
Soft Errors in Flash-based FPGAs: Analysis Methodologies and First Results 258
A new hardware/software platform and a new 1/E neutron source for soft error studies: testing FPGAs at the ISIS facility 257
A New BIST Architecture for Low Power Circuits 254
A design flow for protecting FPGA-based systems against single event upsets 253
Validation of the dependability of CAN-based networked systems 252
ALPS: a peak power estimation tool for sequential circuits 252
Simulation-Based Analysis of SEU Effects in SRAM-Based FPGAs 251
Hypervisor-Based Virtual Hardware for Fault Tolerance in COTS Processors Targeting Space Applications 251
Soft-error detection through software fault-tolerance techniques 249
On-line Detection of Control-Flow Errors in SoCs by means of an Infrastructure IP core 249
Analysis of SEU effects in a pipelined processor 249
A framework to support the design of COTS-based reliable space computers for on-board data handling 248
Coping with SEUs/SETs in microprocessors by means of low-cost solutions: a comparison study 248
Sensitivity evaluation of TMR-hardened circuits to multiple SEUs induced by alpha particles in commercial SRAM-based FPGAs 247
On the Test of Microprocessor IP Cores 246
Application-oriented SEU sensitiveness analysis of Atmel rad-hard FPGAs 246
New Evolutionary Techniques for Test-Program Generation for Complex Microprocessor Cores 245
A new low-cost non intrusive platform for injecting soft errors in SRAM-based FPGAs 244
SOFTWARE-LEVEL SOFT-ERROR MITIGATION TECHNIQUES 244
New Techniques for efficiently assessing reliability of SOCs 243
System-level test bench generation in a co-design framework. 242
Methodologies to study frequency-dependent Single Event Effects sensitivity in Flash-based FPGAs 242
Embedded virtualization techniques for automotive infotainment applications 242
Effectiveness of TMR-based techniques to mitigate alpha-induced SEU accumulation in commercial SRAM-based FPGAs 241
Accurate single-event-transient analysis via zero-delay logic simulation 240
Impact of data cache memory on the single event upset-induced error rate of microprocessors 239
On the evaluation of SEU sensitiveness in SRAM-based FPGAs 239
A new approach to compress the configuration information of programmable devices 238
An Analysis of SEU Effects in Embedded Operating Systems for Real-Time Applications 237
A new Algorithm for the Analysis of the MCUs Sensitiveness of TMR Architectures in SRAM-based FPGAs 235
Soft errors in SRAM-FPGAs: A comparison of two complementary approaches 235
Optimal vector selection for low power BIST 235
Coping With the Obsolescence of Safety - or Mission-Critical Embedded Systems Using FPGAs 234
On the consolidation of mixed criticalities applications on multicore architectures 233
A multi-level approach to the dependability analysis of networked systems based on the CAN protocol 233
A P1500-compatible programmable BIST approach for the test of embedded flash memories 233
A Software Fault Tolerance Method for Safety-Critical Systems: Effectiveness and Drawbacks 233
Analysis of the effects of soft errors on compression algorithms through fault injection inside program variables 232
Analysis of the robustness of the TMR architecture in SRAM-based FPGAs 232
A source-to-source compiler for generating dependable software 232
A new approach to estimate the effect of single event transients in complex circuits 232
Optimization of Self Checking FIR filters by means of Fault Injection Analysis 232
Soft Errors in SRAM-FPGAs: a Comparison of Two Complementary Approaches 232
Layout-Aware Multi-Cell Upsets Effects Analysis on TMR Circuits Implemented on SRAM-Based FPGAs 232
Totale 31307
Salva come PNG Salva come JPEG
Categoria #
all - tutte 112306
article - articoli 28863
book - libri 1204
conference - conferenze 77373
curatela - curatele 541
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 4325
Totale 224612
Salva come PNG Salva come JPEG


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2017/201813829 93113969491012 23361061 18551676 1388256364605
2018/20198164 468357789881 373602 341125 459100314111355
2019/20206834 6814502491067 887673 526836 785313236131
2020/20214526 596706221617 244366 297331 270415317146
2021/20222850 1682473765 136176 115157 95376488790
2022/202344 44000 00 00 0000
Totale 55717
 
 
 
Powered by IRIS-about IRIS-Utilizzo dei cookie
Logo CINECA  Copyright © 2022