Archivio Istituzionale della RicercaCALIMERA, ANDREA
CALIMERA, ANDREA
Dipartimento di Automatica e Informatica
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Risultati 1 - 6 di 6 (tempo di esecuzione: 0.037 secondi).
On the Efficiency of AdapTTA: An Adaptive Test-Time Augmentation Strategy for Reliable Embedded ConvNets
2022 Mocerino, L; Rizzo, Rg; Peluso, V; Calimera, A; Macii, E
Energy-Accuracy Scalable Deep Convolutional Neural Networks: A Pareto Analysis
2019 Peluso, V.; Calimera, A.
Beyond Ideal DVFS Through Ultra-Fine Grain Vdd-Hopping
2017 Peluso, Valentino; Rizzo, ROBERTO GIORGIO; Calimera, Andrea; Macii, Enrico; Alioto, Massimo
Logic Synthesis for Silicon and Beyond-Silicon Multi-gate Pass-Logic Circuits
2017 Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo
Logic Synthesis of CMOS Circuits and Beyond
2017 Macii, Enrico; Calimera, Andrea; Macii, Alberto; Poncino, Massimo
Power-gating for leakage control and beyond
2015 Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo
| Citazione | Data di pubblicazione | Autori | File |
|---|---|---|---|
| On the Efficiency of AdapTTA: An Adaptive Test-Time Augmentation Strategy for Reliable Embedded ConvNets / Mocerino, L; Rizzo, Rg; Peluso, V; Calimera, A; Macii, E (IFIP ADVANCES IN INFORMATION AND COMMUNICATION TECHNOLOGY). - In: VLSI-SoC: Technology Advancement on SoC Design / Grimblatt V., Hong Chang C., Reis R., Chattopadhyay A., Calimera A.. - Cham, Switzerland : SPRINGER INTERNATIONAL PUBLISHING AG, 2022. - ISBN 978-3-031-16817-8. - pp. 1-23 [10.1007/978-3-031-16818-5_1] | 1-gen-2022 | Mocerino, LRizzo, RGPeluso, VCalimera, AMacii, E | AdapTTA___Book_Chapter_for_paper_53_revised_1.pdf |
| Energy-Accuracy Scalable Deep Convolutional Neural Networks: A Pareto Analysis / Peluso, V.; Calimera, A. (IFIP ADVANCES IN INFORMATION AND COMMUNICATION TECHNOLOGY). - In: VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing ParadigmsSTAMPA. - [s.l] : Springer, 2019. - ISBN 978-3-030-23424-9. - pp. 107-127 [10.1007/978-3-030-23425-6_6] | 1-gen-2019 | Peluso V.Calimera A. | - |
| Beyond Ideal DVFS Through Ultra-Fine Grain Vdd-Hopping / Peluso, Valentino; Rizzo, ROBERTO GIORGIO; Calimera, Andrea; Macii, Enrico; Alioto, Massimo - In: VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and ReliabilitySTAMPA. - [s.l] : Springer, 2017. - ISBN 978-3-319-67103-1. - pp. 152-172 [10.1007/978-3-319-67104-8_8] | 1-gen-2017 | PELUSO, VALENTINORIZZO, ROBERTO GIORGIOCALIMERA, ANDREAMACII, EnricoALIOTO, MASSIMO | main.pdf |
| Logic Synthesis for Silicon and Beyond-Silicon Multi-gate Pass-Logic Circuits / Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo - In: VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and ReliabilitySTAMPA. - [s.l] : Springer, 2017. - ISBN 978-3-319-67103-1. - pp. 60-82 [10.1007/978-3-319-67104-8_4] | 1-gen-2017 | TENACE, VALERIOCALIMERA, ANDREAMACII, EnricoPONCINO, MASSIMO | main.pdf |
| Logic Synthesis of CMOS Circuits and Beyond / Macii, Enrico; Calimera, Andrea; Macii, Alberto; Poncino, Massimo - In: Nanoelectronics: Materials, Devices, Applications[s.l] : Wiley-VCH Verlag, 2017. - ISBN 9783527800728. - pp. 331-362 [10.1002/9783527800728.ch14] | 1-gen-2017 | Macii, EnricoAndrea, CalimeraAlberto, MaciiMassimo, Poncino | - |
| Power-gating for leakage control and beyond / Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo - In: Circuit Design for Reliability[s.l] : Springer New York, 2015. - ISBN 9781461440789. - pp. 175-205 [10.1007/978-1-4614-4078-9_9] | 1-gen-2015 | Calimera, AndreaMacii, AlbertoMacii, EnricoPoncino, Massimo | chapter_enrico.pdf |