Sfoglia per Autore
Accurate Mitigation of Single Event Effects on Flash-based FPGAs: A new Design Flow
2013 Sterpone, Luca; Du, Boyang; D., Merodio Codinachs; V., Ferlet Cavrois
A Functional Test Algorithm for the Register Forwarding and Pipeline Interlocking unit in Pipelined Microprocessors
2013 Bernardi, Paolo; Du, Boyang; Ciganda, LYL MERCEDES; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Grosso, Michelangelo; Ballan, O.
EXPLOITING THE DEBUG INTERFACE TO SUPPORT ON LINE TEST OF CONTROL FLOW ERRORS
2013 Du, Boyang; SONZA REORDA, Matteo; Sterpone, Luca; L., Parra; M., PORTELA GARCIA; A., Lindoso; L., Entrena
A New Hybrid Nonintrusive Error-Detection Technique Using Dual Control-Flow Monitoring
2014 L., Parra; A., Lindoso; M., Portela Garcia; L., Entrena; Du, Boyang; SONZA REORDA, Matteo; Sterpone, Luca
On the Functional Test of the Register Forwarding and Pipeline Interlocking Unit in Pipelined Processors
2014 Bernardi, Paolo; Cantoro, Riccardo; Ciganda, LYL MERCEDES; Du, Boyang; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Grosso, Michelangelo; O., Ballan
Analysis and mitigation of single event effects on flash-based FPGAS
2014 Sterpone, Luca; Du, Boyang
A New Solution to On-Line Detection of Control Flow Errors
2014 Du, Boyang; SONZA REORDA, Matteo; Sterpone, Luca; L., Parra; M., Portela Garcia; A., Lindoso; L., Entrena
On the Design of Highly Reliable System-on-Chip using Dynamically Reconfigurable FPGAs
2015 DAVID MERODIO, Codinachs; Du, Boyang; Sterpone, Luca; Venditti, Lorenzo
SET-PAR: Place and Route Tools for the Mitigation of Single Event Transients on Flash-Based FPGAs
2015 Sterpone, Luca; Du, Boyang
Analysis and mitigation of SEUs in ARM-based SoC on Xilinx Virtex-V SRAM-based FPGAS
2015 Du, Boyang; Desogus, Marco; Sterpone, Luca
Radiation-induced single event transients modeling and testing on nanometric flash-based technologies
2015 Sterpone, Luca; Du, Boyang; Azimi, Sarah
Fault-tolerance techniques for soft-core processors using the trace interface
2015 Entrena, Luis; Lindoso, Almudena; Portela Garcia, Marta; Parra, Luis; Du, Boyang; SONZA REORDA, Matteo; Sterpone, Luca
Accurate Analysis of SET effects on Flash-based FPGA System-on-a-Chip for Satellite Application
2016 Raoul, Grimoldi; David, Merodio Codinachs; Luca, Fossati; Du, Boyang; Sterpone, Luca
On the prediction of Radiation-induced SETs in Flash-based FPGAs
2016 Azimi, Sarah; Du, Boyang; Sterpone, Luca
An FPGA-based testing platform for the validation of automotive powertrain ECU
2016 Du, Boyang; Sterpone, Luca
Fault Tolerant Electronic System Design
2016 Du, Boyang
Accurate Analysis of SET effects on Flash-based FPGA System-on-a-Chip for Satellite Applications
2016 Azimi, Sarah; Du, Boyang; Sterpone, Luca; Grimoldi, Raoul; Fossati, Luca; Codinachs, David Merodio
FPGA-controlled PCBA power-on self-test using processor's debug features
2016 Du, Boyang; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Acle, J. Perez; Tsertov, A.
Accurate Analysis of SET effects on Flash-based FPGA System-on-a-Chip for Satellite Applications
2016 Azimi, Sarah; Du, Boyang; Sterpone, Luca
Scalable FPGA Graph model to detect routing faults
2016 Sterpone, Luca; Cabodi, Gianpiero; Finocchiaro, SEBASTIANO FABRIZIO; Loiacono, Carmelo; Savarese, Francesco; Du, Boyang
Citazione | Data di pubblicazione | Autori | File |
---|---|---|---|
Accurate Mitigation of Single Event Effects on Flash-based FPGAs: A new Design Flow / Sterpone, Luca; Du, Boyang; D., Merodio Codinachs; V., Ferlet Cavrois. - ELETTRONICO. - (2013). (Intervento presentato al convegno RADECS tenutosi a Oxford nel September, 2013). | 1-gen-2013 | STERPONE, LucaDU, BOYANG + | - |
A Functional Test Algorithm for the Register Forwarding and Pipeline Interlocking unit in Pipelined Microprocessors / Bernardi, Paolo; Du, Boyang; Ciganda, LYL MERCEDES; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Grosso, Michelangelo; Ballan, O.. - STAMPA. - (2013). (Intervento presentato al convegno IEEE 7th International Design and Test Symposium (IDT) tenutosi a Doha (Qatar) nel December 2012) [10.1109/IDT.2013.6727120]. | 1-gen-2013 | BERNARDI, PAOLODU, BOYANGCIGANDA, LYL MERCEDESSANCHEZ SANCHEZ, EDGAR ERNESTOSONZA REORDA, MatteoGROSSO, MICHELANGELO + | - |
EXPLOITING THE DEBUG INTERFACE TO SUPPORT ON LINE TEST OF CONTROL FLOW ERRORS / Du, Boyang; SONZA REORDA, Matteo; Sterpone, Luca; L., Parra; M., PORTELA GARCIA; A., Lindoso; L., Entrena. - STAMPA. - (2013), pp. 98-103. (Intervento presentato al convegno 2013 IEEE 19th International On-Line Testing Symposium (IOLTS)) [10.1109/IOLTS.2013.6604058]. | 1-gen-2013 | DU, BOYANGSONZA REORDA, MatteoSTERPONE, Luca + | - |
A New Hybrid Nonintrusive Error-Detection Technique Using Dual Control-Flow Monitoring / L., Parra; A., Lindoso; M., Portela Garcia; L., Entrena; Du, Boyang; SONZA REORDA, Matteo; Sterpone, Luca. - In: IEEE TRANSACTIONS ON NUCLEAR SCIENCE. - ISSN 0018-9499. - 61:(2014), pp. 3236-3243. [10.1109/TNS.2014.2361953] | 1-gen-2014 | DU, BOYANGSONZA REORDA, MatteoSTERPONE, Luca + | - |
On the Functional Test of the Register Forwarding and Pipeline Interlocking Unit in Pipelined Processors / Bernardi, Paolo; Cantoro, Riccardo; Ciganda, LYL MERCEDES; Du, Boyang; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Grosso, Michelangelo; O., Ballan. - STAMPA. - (2014), pp. 52-57. (Intervento presentato al convegno 14th International Workshop on Microprocessor Test and Verification (MTV) tenutosi a Austin, Tx, USA nel December 12–13, 2013) [10.1109/MTV.2013.10]. | 1-gen-2014 | BERNARDI, PAOLOCANTORO, RICCARDOCIGANDA, LYL MERCEDESDU, BOYANGSANCHEZ SANCHEZ, EDGAR ERNESTOSONZA REORDA, MatteoGROSSO, MICHELANGELO + | - |
Analysis and mitigation of single event effects on flash-based FPGAS / Sterpone, Luca; Du, Boyang. - ELETTRONICO. - (2014), pp. 1-6. (Intervento presentato al convegno IEEE 19th EUROPEAN TEST SYMPOSIUM (ETS) tenutosi a Paderborn, Germany) [10.1109/ETS.2014.6847804]. | 1-gen-2014 | STERPONE, LucaDU, BOYANG | - |
A New Solution to On-Line Detection of Control Flow Errors / Du, Boyang; SONZA REORDA, Matteo; Sterpone, Luca; L., Parra; M., Portela Garcia; A., Lindoso; L., Entrena. - ELETTRONICO. - (2014), pp. 105-110. (Intervento presentato al convegno IEEE 20th International On-Line Testing Symposium tenutosi a Hotel Cap Roig, Platja d’Aro, Catalunya, Spain). | 1-gen-2014 | DU, BOYANGSONZA REORDA, MatteoSTERPONE, Luca + | - |
On the Design of Highly Reliable System-on-Chip using Dynamically Reconfigurable FPGAs / DAVID MERODIO, Codinachs; Du, Boyang; Sterpone, Luca; Venditti, Lorenzo. - ELETTRONICO. - (2015), pp. 1-6. (Intervento presentato al convegno Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2015 10th International Symposium on tenutosi a Bremen nel June 2015) [10.1109/ReCoSoC.2015.7238082]. | 1-gen-2015 | DU, BOYANGSTERPONE, LUCAVENDITTI, LORENZO + | - |
SET-PAR: Place and Route Tools for the Mitigation of Single Event Transients on Flash-Based FPGAs / Sterpone, Luca; Du, Boyang. - ELETTRONICO. - 9040:(2015), pp. 129-140. (Intervento presentato al convegno 11th International Symposium, ARC 2015, Bochum, Germany, April 13-17, 2015, Proceedings tenutosi a Bochum nel 13-17 April 2015) [10.1007/978-3-319-16214-0_11]. | 1-gen-2015 | STERPONE, LucaDU, BOYANG | - |
Analysis and mitigation of SEUs in ARM-based SoC on Xilinx Virtex-V SRAM-based FPGAS / Du, Boyang; Desogus, Marco; Sterpone, Luca. - (2015), pp. 236-239. (Intervento presentato al convegno 11th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2015 tenutosi a gbr nel 2015) [10.1109/PRIME.2015.7251378]. | 1-gen-2015 | DU, BOYANGDESOGUS, MARCOSTERPONE, LUCA | - |
Radiation-induced single event transients modeling and testing on nanometric flash-based technologies / Sterpone, Luca; Du, Boyang; Azimi, Sarah. - In: MICROELECTRONICS RELIABILITY. - ISSN 0026-2714. - ELETTRONICO. - 55:9-10(2015), pp. 2087-2091. [10.1016/j.microrel.2015.07.035] | 1-gen-2015 | STERPONE, LUCADU, BOYANGAZIMI, SARAH | - |
Fault-tolerance techniques for soft-core processors using the trace interface / Entrena, Luis; Lindoso, Almudena; Portela Garcia, Marta; Parra, Luis; Du, Boyang; SONZA REORDA, Matteo; Sterpone, Luca - In: FPGAs and Parallel Architectures for Aerospace Applications: Soft Errors and Fault-Tolerant Design[s.l] : Springer International Publishing, 2015. - ISBN 9783319143521. - pp. 293-306 [10.1007/978-3-319-14352-1_19] | 1-gen-2015 | DU, BOYANGSONZA REORDA, MATTEOSTERPONE, LUCA + | - |
Accurate Analysis of SET effects on Flash-based FPGA System-on-a-Chip for Satellite Application / Raoul, Grimoldi; David, Merodio Codinachs; Luca, Fossati; Du, Boyang; Sterpone, Luca. - ELETTRONICO. - (2016). (Intervento presentato al convegno IEEE 19th International Symposium on Design and Diagnostic of Electronic Circuits & Systems (DDECS) tenutosi a Kosice, Slovakia nel April 20-22). | 1-gen-2016 | DU, BOYANGSTERPONE, LUCA + | - |
On the prediction of Radiation-induced SETs in Flash-based FPGAs / Azimi, Sarah; Du, Boyang; Sterpone, Luca. - In: MICROELECTRONICS RELIABILITY. - ISSN 0026-2714. - ELETTRONICO. - 64:(2016), pp. 230-234. [10.1016/j.microrel.2016.07.106] | 1-gen-2016 | AZIMI, SARAHDU, BOYANGSTERPONE, LUCA | - |
An FPGA-based testing platform for the validation of automotive powertrain ECU / Du, Boyang; Sterpone, Luca. - (2016), pp. 1-7. (Intervento presentato al convegno 24th Annual IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016 tenutosi a est nel 2016) [10.1109/VLSI-SoC.2016.7753553]. | 1-gen-2016 | DU, BOYANGSTERPONE, LUCA | - |
Fault Tolerant Electronic System Design / Du, Boyang. - (2016). [10.6092/polito/porto/2644047] | 1-gen-2016 | DU, BOYANG | DU_BOYANG_thesis.pdf |
Accurate Analysis of SET effects on Flash-based FPGA System-on-a-Chip for Satellite Applications / Azimi, Sarah; Du, Boyang; Sterpone, Luca; Grimoldi, Raoul; Fossati, Luca; Codinachs, David Merodio. - ELETTRONICO. - (2016). (Intervento presentato al convegno 2016 IEEE 19th International Symposium on Design and Diagnostic of Electronic Circuits & Systems (DDECS) tenutosi a Kosice nel April 20-22). | 1-gen-2016 | AZIMI, SARAHDU, BOYANGSTERPONE, LUCA + | - |
FPGA-controlled PCBA power-on self-test using processor's debug features / Du, Boyang; SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Acle, J. Perez; Tsertov, A.. - (2016), pp. 1-6. (Intervento presentato al convegno 19th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2016 tenutosi a svk nel 2016) [10.1109/DDECS.2016.7482458]. | 1-gen-2016 | DU, BOYANGSANCHEZ SANCHEZ, EDGAR ERNESTOSONZA REORDA, Matteo + | - |
Accurate Analysis of SET effects on Flash-based FPGA System-on-a-Chip for Satellite Applications / Azimi, Sarah; Du, Boyang; Sterpone, Luca. - ELETTRONICO. - (2016). (Intervento presentato al convegno Radiation Effects on Components & Systems Conference) [10.1109/RADECS.2016.8093203]. | 1-gen-2016 | AZIMI, SARAHDU, BOYANGSTERPONE, LUCA | RADECS_Sterpone_PJ6.pdf; Accurate_analysis_of_SET_effects_on_Flash-based_FPGA_System-on-a-Chip_for_satellite_applications.pdf |
Scalable FPGA Graph model to detect routing faults / Sterpone, Luca; Cabodi, Gianpiero; Finocchiaro, SEBASTIANO FABRIZIO; Loiacono, Carmelo; Savarese, Francesco; Du, Boyang. - ELETTRONICO. - (2016). (Intervento presentato al convegno IEEE International Symposium on On-Line Testing and Robust System Design) [10.1109/IOLTS.2016.7604690]. | 1-gen-2016 | STERPONE, LUCACABODI, GianpieroFINOCCHIARO, SEBASTIANO FABRIZIOLOIACONO, CARMELOSAVARESE, FRANCESCODU, BOYANG | - |
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